[PATCH 2/4] mtd: spi-nor: micron-st: add die erase for mt35xu512aba

[Bough Chen]

> -----Original Message-----
> From: Tudor Ambarus <tudor.ambarus at linaro.org>
> Sent: 2025年11月10日 14:39
> To: Bough Chen <haibo.chen at nxp.com>; Pratyush Yadav
> <pratyush at kernel.org>; Michael Walle <mwalle at kernel.org>; Miquel Raynal
> <miquel.raynal at bootlin.com>; Richard Weinberger <richard at nod.at>; Vignesh
> Raghavendra <vigneshr at ti.com>
> Cc: linux-mtd at lists.infradead.org; linux-kernel at vger.kernel.org;
> imx at lists.linux.dev
> Subject: Re: [PATCH 2/4] mtd: spi-nor: micron-st: add die erase for
> mt35xu512aba
> 
> 
> 
> On 11/10/25 6:02 AM, Haibo Chen wrote:
> > mt35xu512aba do not support chip erase command, and it contains one
> > die, and only support die erase.
> 
> does this need a fixes tag then? With that:
> Reviewed-by: Tudor Ambarus <tudor.ambarus at linaro.org>>
> > Unfortunately the die erase opcode does not have a 4-byte opcode, here
> > forced to enter in the 4 byte address mode in order to benefit of the
> > die erase.
> >
> > Link:
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdata
> >
> sheet.octopart.com%2FMT35XU02GCBA1G12-0AAT-Micron-datasheet-138896
> 808.
> >
> pdf&data=05%7C02%7Chaibo.chen%40nxp.com%7C2632ec31f3424748f8a308d
> e2023
> >
> c973%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C6389835352669
> 00290%7
> >
> CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAw
> MCIsIlA
> >
> iOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=H
> 0Boi
> > thmOc0vuK6MNfCYHCgS8fPONWqzPi%2Fi5gFlcuA%3D&reserved=0
> > Signed-off-by: Haibo Chen <haibo.chen at nxp.com>
> > ---
> 
> Also, would you please help us with SFDP dumps, as you did in the next patches?
> It helps ups keep a database and update flashes to get rid of the non SFDP data.

Okay, will add in next version.

Regards
Haibo Chen
> 
> Thanks!
> 
> >  drivers/mtd/spi-nor/micron-st.c | 17 +++++++++++++++++
> >  1 file changed, 17 insertions(+)
> >
> > diff --git a/drivers/mtd/spi-nor/micron-st.c
> > b/drivers/mtd/spi-nor/micron-st.c index
> >
> 92eb14ca76c57f29ece1edb3fe652c56d1c2888f..89cd146095584ddebdd258a18
> 6f6
> > 398b420e5800 100644
> > --- a/drivers/mtd/spi-nor/micron-st.c
> > +++ b/drivers/mtd/spi-nor/micron-st.c
> > @@ -159,6 +159,22 @@ static int micron_st_nor_two_die_late_init(struct
> spi_nor *nor)
> >  	return spi_nor_set_4byte_addr_mode(nor, true);  }
> >
> > +static int micron_st_nor_one_die_late_init(struct spi_nor *nor) {
> > +	struct spi_nor_flash_parameter *params = nor->params;
> > +
> > +	params->die_erase_opcode = SPINOR_OP_MT_DIE_ERASE;
> > +	params->n_dice = 1;
> > +
> > +	/*
> > +	 * Unfortunately the die erase opcode does not have a 4-byte opcode
> > +	 * correspondent for these flashes. The SFDP 4BAIT table fails to
> > +	 * consider the die erase too. We're forced to enter in the 4 byte
> > +	 * address mode in order to benefit of the die erase.
> > +	 */
> > +	return spi_nor_set_4byte_addr_mode(nor, true); }
> > +
> >  static void mt35xu512aba_default_init(struct spi_nor *nor)  {
> >  	nor->params->set_octal_dtr = micron_st_nor_set_octal_dtr; @@ -189,6
> > +205,7 @@ static int mt35xu512aba_post_sfdp_fixup(struct spi_nor *nor)
> > static const struct spi_nor_fixups mt35xu512aba_fixups = {
> >  	.default_init = mt35xu512aba_default_init,
> >  	.post_sfdp = mt35xu512aba_post_sfdp_fixup,
> > +	.late_init = micron_st_nor_one_die_late_init,
> >  };
> >
> >  static const struct flash_info micron_nor_parts[] = {
> >