[PATCH v3 4/4] spi: spi-qpic-snand: set nandc_offset for ipq9574

[Md Sadre Alam]

On 3/18/2025 8:28 PM, Gabor Juhos wrote:
> 2025. 03. 10. 13:09 keltezéssel, Md Sadre Alam írta:
>> The BAM block expects NAND register addresses to be computed based on
>> the NAND register offset from QPIC base. This value is 0x30000 for
>> ipq9574. Update the 'nandc_offset' value in the qcom_nandc_props
>> appropriately.
>>
>> Signed-off-by: Md Sadre Alam <quic_mdalam at quicinc.com>
>> ---
>>
>> Change in [v3]
>>
>> * Added nand_offset for proper address calculation
>>    for newer Socs
>>
>> Change in [v2]
>>
>> * This patch was not part of v2
>>
>> Change in [v1]
>>
>> * This patch was not part of v1
>>
>>   drivers/spi/spi-qpic-snand.c | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/spi/spi-qpic-snand.c b/drivers/spi/spi-qpic-snand.c
>> index 8c413a6a5152..85a742e21cf9 100644
>> --- a/drivers/spi/spi-qpic-snand.c
>> +++ b/drivers/spi/spi-qpic-snand.c
>> @@ -1604,6 +1604,7 @@ static void qcom_spi_remove(struct platform_device *pdev)
>>   static const struct qcom_nandc_props ipq9574_snandc_props = {
>>   	.dev_cmd_reg_start = 0x7000,
>>   	.supports_bam = true,
>> +	.nandc_offset = 0x30000,
>>   };
> 
> Applying the first patch alone results in the following error on IPQ9574:
> 
> [    3.596403] qcom_snand 79b0000.spi: failure in submitting cmd descriptor
> [    3.596490] spi-nand spi0.0: probe with driver spi-nand failed with error -110
> 
> So this change should be integrated into the first patch. Otherwise, SPI NAND
> support would be broken on IPQ9574 temporarily between the first and the
> current patch.
Ok, will integrate this in first patch in next revision.
> 
> Regards,
> Gabor