[PATCH v14 1/3] dt-bindings: mtd: Describe MTD partitions concatenation

[Rob Herring (Arm)]

On Mon, 23 Jun 2025 16:24:43 +0530, Amit Kumar Mahapatra wrote:
> The AMD QSPI controller supports an advanced connection modes called
> Stacked mode which allow the controller to treat two different flashes
> as one storage.
> 
> In Stacked connection mode flashes share the same SPI bus, but different CS
> line, controller driver asserts the CS of the flash to which it needs to
> communicate. Stacked mode is a software abstraction rather than a
> controller feature or capability. At any given time, the controller
> communicates with one of the two connected flash devices, as determined by
> the requested address and data length. If an operation starts on one flash
> and ends on the other, the mtd layer needs to split it into two separate
> operations and adjust the data length accordingly. For more information on
> the modes please feel free to go through the controller flash interface
> below [1].
> 
> To support stacked mode, the existing MTD concat driver has been extended
> to be more generic, enabling multiple sets of MTD partitions to be
> virtually concatenated, with each set forming a distinct logical MTD
> device.
> 
> A new Device Tree property is introduced to facilitate this, containing
> phandles of the partitions to be concatenated with the one where the
> property is defined. This approach supports multiple sets of concatenated
> partitions.
> 
> [1] https://docs.amd.com/r/en-US/am011-versal-acap-trm/QSPI-Flash-Device-Interface
> 
> Suggested-by: Miquel Raynal <miquel.raynal at bootlin.com>
> Suggested-by: Rob Herring <robh at kernel.org>
> Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra at amd.com>
> ---
>  .../bindings/mtd/partitions/partition.yaml    | 20 +++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 

Reviewed-by: Rob Herring (Arm) <robh at kernel.org>