[PATCH] Revert "mtd: spi-nor: micron-st: use SFDP of mt35xu512aba"

[Bough Chen]

> -----Original Message-----
> From: Michael Walle <mwalle at kernel.org>
> Sent: 2025年12月12日 16:35
> To: Bough Chen <haibo.chen at nxp.com>; Tudor Ambarus
> <tudor.ambarus at linaro.org>; Pratyush Yadav <pratyush at kernel.org>; Miquel
> Raynal <miquel.raynal at bootlin.com>; Richard Weinberger <richard at nod.at>;
> Vignesh Raghavendra <vigneshr at ti.com>
> Cc: linux-mtd at lists.infradead.org; linux-kernel at vger.kernel.org; Han Xu
> <han.xu at nxp.com>
> Subject: Re: [PATCH] Revert "mtd: spi-nor: micron-st: use SFDP of
> mt35xu512aba"
> 
> Hi,
> 
> On Fri Dec 12, 2025 at 9:30 AM CET, Haibo Chen wrote:
> > This reverts commit 44dd635cd632824f412ff2a6b320d9302a277ad0.
> >
> > Find two batches mt35xu512aba has different SFDP but with same jedec
> > ID. To make all batches of mt35xu512aba work well and support OCT DTR
> > mode, back to hardcode the flags.
> 
> What are "batches" in this case? A new revision of the same flash chip? Why
> would they use a different ID then.

Hi Michael,

Yes, seems a new revision of the same flash chip. Anyone from Micron can confirm this?

What's the normal way for vendors to update the SFDP? Seems also need to update/change the ID.


> What's wrong with the parsed flags? Both support SFDP, so if you really need to
> fixup any flags, please use a fixup callback to actually fix them. But first, what
> will go wrong?

Yes, sorry to lack this information.

For mt35xu512aba chip with label 0DA15 RW303, the SFDP do not support OCT DTR read/write operation, 
but still has one .fixups = &mt35xu512aba_fixups, in this fix up, it config the OCT DTR read operation, so
finally read_proto == SNOR_PROTO_8_8_8_DTR, but nor->write_proto == SNOR_PROTO_1_1_1, then has
no chance to call micron_st_nor_octal_dtr_en(), when there is read operation, use OCT DTR read command
meet issue.

With this revert patch, I test mt35xu512aba chip with label 0DA15 RW303, OCT DTR mode can work well.
Also test mt35xu512aba chip with label 4KA17 RW303, OCT DTR mode work find too.

Regards
Haibo Chen

> 
> -michael
> 
> > Signed-off-by: Haibo Chen <haibo.chen at nxp.com>
> > ---
> > mt35xu512aba chip with label 4KA17 RW303:
> > root at imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# cat jedec_id
> > 2c5b1a root at imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# cat
> > manufacturer micron
> > root at imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# hexdump -Cv sfdp
> > 00000000  53 46 44 50 0a 01 03 ff  00 08 01 17 30 00 00 ff
> > |SFDP........0...|
> > 00000010  84 00 01 02 90 00 00 ff  05 01 01 06 a0 00 00 ff
> > |................|
> > 00000020  0a 00 01 08 b0 00 00 ff  ff ff ff ff ff ff ff ff
> > |................|
> > 00000030  e5 20 8a ff ff ff ff 1f  00 00 00 00 00 00 00 00  |.
> > ..............|
> > 00000040  ee ff ff ff ff ff 00 00  ff ff 00 00 0c 20 11 d8
> > |............. ..|
> > 00000050  0f 52 00 00 39 61 99 00  87 8e 03 d3 ac a1 27 3d
> > |.R..9a........'=|
> > 00000060  7a 75 7a 75 fb bd d5 5c  00 00 70 ff 81 50 f8 a1
> > |zuzu...\..p..P..|
> > 00000070  2f cb 27 8b 00 00 04 01  00 06 01 00 ff ff ff 8e
> > |/.'.............|
> > 00000080  00 00 00 00 00 00 00 00  00 00 00 00 ff ff ff ff
> > |................|
> > 00000090  43 0e ff ff 21 dc 5c ff  ff ff ff ff ff ff ff ff
> > |C...!.\.........|
> > 000000a0  00 0b 80 9e b1 81 b5 85  00 f0 ff 9f 00 0a 00 00
> > |................|
> > 000000b0  00 0a 1a 88 10 00 00 00  ff ff ff ff ff ff ff ff
> > |................|
> > 000000c0  00 00 06 01 00 00 00 00  14 01 81 03 00 00 00 00
> > |................|
> > 000000d0
> >
> > mt35xu512aba chip with label 0DA15 RW303:
> > root at imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# ls jedec_id
> > manufacturer  sfdp root at imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor#
> > cat jedec_id 2c5b1a
> > root at imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# cat manufacturer
> > micron root at imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# hexdump -Cv
> > sfdp
> > 00000000  53 46 44 50 06 01 01 ff  00 06 01 10 30 00 00 ff
> > |SFDP........0...|
> > 00000010  84 00 01 02 80 00 00 ff  ff ff ff ff ff ff ff ff
> > |................|
> > 00000020  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff
> > |................|
> > 00000030  e5 20 8a ff ff ff ff 1f  00 00 00 00 00 00 00 00  |.
> > ..............|
> > 00000040  ee ff ff ff ff ff 00 00  ff ff 00 00 0c 20 11 d8
> > |............. ..|
> > 00000050  0f 52 00 00 24 5a 99 00  8b 8e 03 e1 ac 01 27 38
> > |.R..$Z........'8|
> > 00000060  7a 75 7a 75 fb bd d5 5c  00 00 70 ff 81 b0 38 36
> > |zuzu...\..p...86|
> > 00000070  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
> > 00000080  43 0e ff ff 21 dc 5c ff                           |C...!.\.|
> > 00000088
> 
> Thanks!
> 
> -michael