[PATCH] Revert "mtd: spinand: esmt: fix id code for F50D1G41LB"

Md Sadre Alam quic_mdalam at quicinc.com
Mon Dec 8 02:26:20 PST 2025


Hi,

On 12/8/2025 2:56 PM, George Moussalem wrote:
> 
> 
> On 12/8/25 12:33, Miquel Raynal wrote:
>> On 02/12/2025 at 23:05:56 +08, Ziyang Huang <hzyitc at outlook.com> wrote:
>>
>>> This reverts commit dd26402642a0899fde59ea6b0852fad3d799b4cc.
>>>
>>> The issue George met is due to the limit of QPIC, not the issue of the
>>> flash chip.
>>>
>>> QPIC only supports 4 bytes ID. So the fifth byte is always 0.
>>>
>>> If we use spi-gpio, the fifth byte can be read correctly.
>>>
>>> Signed-off-by: Ziyang Huang <hzyitc at outlook.com>
>>> ---
>>
>> So how do we solve that?
>>
>> Is there anything than can be done on the qpic side?
> 
> Hi Alam,
> 
> Is the hardware itself limited to reading 4 ID bytes only or is it a
> driver limitation?

The hardware itself is limited to returning 4 ID bytes. QPIC reads the 
device ID and places it into the QPIC_NAND_FLASH_READ_ID register, which 
is 32‑bit wide. As a result, only 4 bytes of the device ID are available 
to software. The register stores the ID bytes in the order [31:24] = 
byte 3, [23:16] = byte 2, [15:8] = byte 1, [7:0] = byte 0.

Thanks,
Alam.




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