[PATCH v2 1/3] dt-bindings: mtd: cdns,hp-nfc: Add dma-coherent property

[Rob Herring (Arm)]

On Wed, 03 Dec 2025 07:47:33 +0800, Khairul Anuar Romli wrote:
> The Cadence HP NAND Flash Controller on supports DMA transactions through
> a coherent interconnect. In previous generations SoC (Stratix10 and Agilex)
> the interconnect was non-coherent, hence there is no need for dma-coherent
> property to be presence. In Agilex 5, the architecture has changed. It
> introduced a coherent interconnect that supports cache-coherent DMA.
> 
> Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli at altera.com>
> ---
> Changes in v2:
> 	- Rephrase commit message to describe why the property is needed now
> 	  and was not needed previously.
> 	- Remove redundant statement.
> ---
>  Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml | 2 ++
>  1 file changed, 2 insertions(+)
> 

Reviewed-by: Rob Herring (Arm) <robh at kernel.org>