[PATCH v3 2/2] mtd: spi-nor: core: avoid odd length/address writes in 8D-8D-8D mode

[Pratyush Yadav]

Hi Luke,

On Wed, Aug 13 2025, Luke Wang wrote:

> Gentle ping on this, are there any comments or issues?

I plan to review it this in the next couple weeks (hopefully this one).

>> 
>> On Octal DTR capable flashes like Micron Xcella the writes cannot start
>> or end at an odd address in Octal DTR mode. Extra 0xff bytes need to be
>> appended or prepended to make sure the start address and end address are
>> even. 0xff is used because on NOR flashes a program operation can only
>> flip bits from 1 to 0, not the other way round. 0 to 1 flip needs to
>> happen via erases.
>> 
>> Signed-off-by: Pratyush Yadav <p.yadav at ti.com>
>> Reviewed-by: Michael Walle <michael at walle.cc>
>> Signed-off-by: Luke Wang <ziniu.wang_1 at nxp.com>
[...]

-- 
Regards,
Pratyush Yadav