[RFC PATCH 0/2] Add support for stacked and parallel memories

[Mahapatra, Amit Kumar]

Hello,

> > Stacked:
> > Flashes share the same SPI bus, but different CS line, controller
> > driver asserts the CS of the flash to which it needs to communicate.
> > Stacked mode is a software abstraction rather than a controller feature or
> capability.
> > At any given time, the controller communicates with one of the two
> > connected flash devices, as determined by the requested address and
> > data length. If an operation starts on one flash and ends on the
> > other, the core needs to split it into two separate operations and
> > adjust the data length accordingly.
> >
> > Parallel(Multi-CS):
> > Both the flashes have their separate SPI bus, CS of both the flashes
> > will be asserted/de-asserted at the same time. In this mode data will
> > be split across both the flashes by enabling the STRIPE setting in the controller.
> > Parallel mode is a controller feature where if the STRIPE bit is set
> > then the controller internally handles the data split during data
> > write to the flashes and while reading data from the flash the
> > controller internally merges data from both the flashes before writing to the
> controller FIFO.
> > If STRIPE is not enabled, then same data will be sent to both the devices.
> > In parallel mode both the flashes should be identical.
> 
> Interesting.
> 
> What's the practical use case ? Some kind of RAID directly on raw flashes ? Could it

In a parallel configuration, the user can double the flash capacity 
and data throughput.

Users disable STRIPE when they need to access the flash device 
registers for reading or writing.
 
> help for protecting from a broken boot flash ?

No, because each read/write operation communicates with both flash 
devices simultaneously, meaning the image will be distributed across 
both flashes and read from both during boot.

Regards,
Amit

> 
> 
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