[PATCH 0/5] Implement setup_inteface() in the DaVinci NAND controller

Bastien Curutchet bastien.curutchet at bootlin.com
Wed Oct 30 03:47:12 PDT 2024


Hi all,

This patch series aims to implement the setup_interface() operation in
the DaVinci NAND controller to enable the use of all ONFI modes and
improve the NAND access speed.

This NAND controller is present in the DaVinci (OMAP L138) and Keystone2
SoCs and functions as a 'child' of the AEMIF controller. So its timings
are set by the AEMIF controller itself from device-tree properties.
Implementing the setup_interface() callback implies being able to update
dynamically these timings, so the first two patches of the series modify
the AEMIF driver to provide its 'children' a way to modify their chip
select timing configuration. To do so, I add a ti-aemif.h header, I'm not
sure whether this header should be located in include/memory or in
include/linux/memory. I put it in include/memory because the folder
already exists while include/linux/memory doesn't.

The remaining patches implement the setup_interface() operation.
The computation of the register's contents is directly based on
§20.3.2.3 of the OMAP-L138 TRM [1]

This has been tested on two platforms based upon the DaVinci SoC. One is
interfaced with a Macronix MX30UF4G18AC NAND, the other with a Toshiba
NAND.

[1] : https://www.ti.com/lit/ug/spruh77c/spruh77c.pdf

Bastien Curutchet (5):
  memory: ti-aemif: Create aemif_set_cs_timings()
  memory: ti-aemif: export aemif_set_cs_timing()
  mtd: rawnand: davinci: Order headers alphabetically
  mtd: rawnand: davinci: Add clock resource
  mtd: rawnand: davinci: Implement setup_interface() operation

 drivers/memory/ti-aemif.c           | 102 +++++++++++++++++++---------
 drivers/mtd/nand/raw/davinci_nand.c |  95 ++++++++++++++++++++++++--
 include/memory/ti-aemif.h           |  31 +++++++++
 3 files changed, 191 insertions(+), 37 deletions(-)
 create mode 100644 include/memory/ti-aemif.h

-- 
2.47.0




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