[PATCH v2] mtd: spinand: add support for FORESEE F35SQA002G

[Miquel Raynal]

Hello,

> Several SPI-MEM controller don't allow software controlled CS, or for some
> other reasons are unable to execute a longer spi-mem op.
> spi_mem_dirmap_write returns the actual request size it's able to make,
> and spinand_write_to_cache_op use a while loop to split one update_cache
> request into multiple ones.
>
> This only works using the Random Program Load instruction (84h/34h)
> which preserves the previous written data in the flash data cache.
> All current supported flashes are exclusively using 84h/34h as the command
> to write the page cache.
>
> Load Program Data(02h/32h) will clear the entire page cache. As a
> result, when a request is split as described above, the previous written
> data will be cleared, breaking the page cache writing procedure.
>
> We can change write_to_cache_op to use Load Program Data on the
> first request. If that doesn't finish writing, use Random Program Load
> on subsequent data loading.

Sounds reasonable indeed, feel free to send a patch.

Thanks,
Miquèl