[PATCH v7 2/7] spi: spi-mem: Allow specifying the byte order in DTR mode

[Michael Walle]

>>>   * @data.ecc: whether error correction is required or not
>>>   * @data.dir: direction of the transfer
>>>   * @data.nbytes: number of data bytes to send/receive. Can be zero 
>>> if
>>> the
>>> @@ -123,6 +125,7 @@ struct spi_mem_op {
>>>      struct {
>>>          u8 buswidth;
>>>          u8 dtr : 1;
>>> +        u8 dtr_swab16 : 1;
>>>          u8 ecc : 1;
>>>          u8 __pad : 6;
>> 
>> __pad : 5;
>> 
>> Does anyone know if this is really necessary?
>> 
> 
> it's to mitigate a gcc-{12, 13} bug, see
> 71c8f9cf2623d0db79665f876b95afcdd8214aec
> 
> No idea if the bug was fixed in the meantime.

Ahh right, me of all, should've remembered that ;)

-michael