[PATCH v3 2/2] mtd: spi-nor: micron-st: Add support for mt25qu01g

[Fabio Estevam]

On Fri, Oct 27, 2023 at 9:59 AM Tudor Ambarus <tudor.ambarus at linaro.org> wrote:

> start looking at how spi_nor_erase() is implemented. When addr and
> length are die aligned you may use the erase die command.

Thanks. I will look at it.

> It probably works because by some reason the reads are done in 4MB
> steps, and we don't have any cross-die reads.
> Please re-do the erase-write-readback-compare test starting at 61MB
> offset with 4 MB length. This way we'll have 2 MB tested in the first
> die and 2 MB in the second one.

Here are the cross-die results:

~# time flash_erase /dev/mtd0 0x03e00000 0
Erasing 64 Kibyte @ 7ff0000 -- 100 % complete

real 0m5.198s
user 0m0.000s
sys 0m4.708s

~# time mtd_debug write /dev/mtd0 0x03e00000 4194304 spi_test_4M
Copied 4194304 bytes from spi_test_4M to address 0x03e00000 in flash

real 0m3.952s
user 0m0.001s
sys 0m3.646s

~# time mtd_debug read /dev/mtd0 0x03e00000 4194304 spi_read_4M
[ 5207.981747] spi-nor spi0.0: from 0x03e00000, len 4194304
Copied 4194304 bytes from address 0x03e00000 in flash to spi_read_4M

real 0m0.117s
user 0m0.002s
sys 0m0.114s

~# sha1sum spi_test_4M spi_read_4M
d3605a79e5d4edbd0a42bd356db354857bf381a6  spi_test_4M
d3605a79e5d4edbd0a42bd356db354857bf381a6  spi_read_4M
~#