[PATCH v5 19/39] mtd: rawnand: add support for ts72xx
Andy Shevchenko
andriy.shevchenko at intel.com
Wed Nov 22 04:24:24 PST 2023
On Wed, Nov 22, 2023 at 11:59:57AM +0300, Nikita Shubin wrote:
> Technologic Systems has it's own nand controller implementation in CPLD.
...
> +static int ts72xx_nand_attach_chip(struct nand_chip *chip)
> +{
> + switch (chip->ecc.engine_type) {
> + case NAND_ECC_ENGINE_TYPE_SOFT:
> + if (chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN)
> + chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
> + chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
> + break;
> + case NAND_ECC_ENGINE_TYPE_ON_HOST:
> + return -EINVAL;
> + default:
> + break;
> + }
> +
> + return 0;
Move this to default.
> +}
...
> + for (i = 0; i < instr->ctx.addr.naddrs; i++)
> + iowrite8(instr->ctx.addr.addrs[i], data->base);
iowrite8_rep() ?
> + case NAND_OP_DATA_IN_INSTR:
> + ioread8_rep(data->base, instr->ctx.data.buf.in, instr->ctx.data.len);
Hehe, you are even using it...
...
> + if (instr->delay_ns)
What will happen if you drop this check?
> + ndelay(instr->delay_ns);
...
> + int ret;
> +
> + ret = mtd_device_unregister(nand_to_mtd(chip));
> + WARN_ON(ret);
Is this a requirement by MTD to have return value being checked?
--
With Best Regards,
Andy Shevchenko
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