[PATCH v5] mtd: rawnand: hynix: fix up bit 0 of sdr_timing_mode

Miquel Raynal miquel.raynal at bootlin.com
Wed Mar 22 09:08:46 PDT 2023

On Fri, 2023-03-10 at 08:06:09 UTC, Hector Palacios wrote:
> According to the ONFI specification, bit 0 of 'SDR timing mode support'
> (bytes 129-130) "shall be 1". That means the NAND supports at least
> timing mode 0.
> NAND chip Hynix H27U4G8F2GDA-BI (at least) is reading a 0 on this field
> which makes nand_choose_best_sdr_timings() return with error and the
> probe function to eventually fail.
> Given that sdr_timing_modes bit 0 must be 1 by specification, force
> it in case the NAND reports it is not set. This is a safe assumption
> because the mode 0 is the minimum (safer) set of timings that the
> NAND can work with.
> Signed-off-by: Hector Palacios <hector.palacios at digi.com>
> Signed-off-by: Miquel Raynal <miquel.raynal at bootlin.com>
> Link: https://lore.kernel.org/linux-mtd/20230223165104.525852-1-hector.palacios@digi.com

Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git nand/next, thanks.


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