[PATCH] mtd: spi-nor: spansion: Determine current address mode
tkuw584924 at gmail.com
tkuw584924 at gmail.com
Tue Mar 14 20:40:04 PDT 2023
From: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>
Internal address mode (3- or 4-byte) affects to the address length in
Read Any Reg op. Read Any Reg op is used in SMPT parse and other setup
functions. Current driver assumes that address mode is factory default
but users can change it via volatile and non-volatile registers.
Current address mode can be checked by CFR2V[7] but Read Any Reg op is
needed to read CFR2V (chicken-and-egg).
This patch introduces a way to determine current address mode by
comparing status register 1 values read by different address length.
Suggested-by: Tudor Ambarus <tudor.ambarus at linaro.org>
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>
---
drivers/mtd/spi-nor/spansion.c | 170 ++++++++++++++++++++++++++++++++-
1 file changed, 167 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
index 1678b7b2e9f7..154ea148d5ca 100644
--- a/drivers/mtd/spi-nor/spansion.c
+++ b/drivers/mtd/spi-nor/spansion.c
@@ -14,10 +14,12 @@
#define SPINOR_OP_CLSR 0x30 /* Clear status register 1 */
#define SPINOR_OP_RD_ANY_REG 0x65 /* Read any register */
#define SPINOR_OP_WR_ANY_REG 0x71 /* Write any register */
+#define SPINOR_REG_CYPRESS_STR1V 0x00800000
#define SPINOR_REG_CYPRESS_CFR1V 0x00800002
#define SPINOR_REG_CYPRESS_CFR1_QUAD_EN BIT(1) /* Quad Enable */
#define SPINOR_REG_CYPRESS_CFR2V 0x00800003
#define SPINOR_REG_CYPRESS_CFR2_MEMLAT_11_24 0xb
+#define SPINOR_REG_CYPRESS_CFR2_ADRBYT BIT(7)
#define SPINOR_REG_CYPRESS_CFR3V 0x00800004
#define SPINOR_REG_CYPRESS_CFR3_PGSZ BIT(4) /* Page size. */
#define SPINOR_REG_CYPRESS_CFR5V 0x00800006
@@ -188,6 +190,153 @@ static int cypress_nor_quad_enable_volatile(struct spi_nor *nor)
return 0;
}
+/**
+ * cypress_nor_determine_addr_mode_by_sr1() - Determine current address mode
+ * (3- or 4-byte) by querying status
+ * register 1 (SR1).
+ * @nor: pointer to a 'struct spi_nor'
+ * @addr_mode_nbytes: pinter to buffer for current address mode (3 or 4).
+ * @write_enable: true to perform write enable op before reading SR1.
+ *
+ * This function tries to determine current address mode by comparing SR1 value
+ * from RDSR1(no address), RDAR(3-byte address), and RDAR(4-byte address).
+ *
+ * The factory default of SR1 (00h) may be vulnerable as reference pattern
+ * because value from RDAR can accidentally get 00h even if address nbytes is
+ * wrong. To mitigate this, use write enable op that sets bit-1 in SR1.
+ *
+ * The 'addr_mode_nbytes' is used as input buffer for predetermined address
+ * nbytes as well as output buffer for determination result. If 0 is specified,
+ * RDAR is performed twice with 3- and 4-byte address. If 3 or 4 is specified,
+ * RDAR is performed just once with specified address nbytes.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int cypress_nor_determine_addr_mode_by_sr1(struct spi_nor *nor,
+ u8 *addr_mode_nbytes,
+ bool write_enable)
+{
+ struct spi_mem_op op =
+ CYPRESS_NOR_RD_ANY_REG_OP(0, SPINOR_REG_CYPRESS_STR1V, 0,
+ nor->bouncebuf);
+ u8 predeterm = *addr_mode_nbytes;
+ bool is3byte, is4byte;
+ int ret;
+
+ if (write_enable) {
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ return ret;
+ }
+
+ ret = spi_nor_read_sr(nor, &nor->bouncebuf[1]);
+ if (ret)
+ goto out;
+
+ is3byte = false;
+ if (!predeterm || predeterm == 3) {
+ op.addr.nbytes = 3;
+ ret = spi_nor_read_any_reg(nor, &op, nor->reg_proto);
+ if (ret)
+ goto out;
+
+ is3byte = (nor->bouncebuf[0] == nor->bouncebuf[1]);
+ }
+
+ is4byte = false;
+ if (!predeterm || predeterm == 4) {
+ op.addr.nbytes = 4;
+ ret = spi_nor_read_any_reg(nor, &op, nor->reg_proto);
+ if (ret)
+ goto out;
+
+ is4byte = (nor->bouncebuf[0] == nor->bouncebuf[1]);
+ }
+
+ if ((is3byte && is4byte) || (!is3byte && !is4byte))
+ *addr_mode_nbytes = 0;
+ else if (is3byte)
+ *addr_mode_nbytes = 3;
+ else
+ *addr_mode_nbytes = 4;
+
+out:
+ if (write_enable)
+ spi_nor_write_disable(nor);
+
+ return ret;
+}
+
+/**
+ * cypress_nor_set_addr_mode_nbytes() - Set the number of address bytes mode of
+ * current address mode.
+ * @nor: pointer to a 'struct spi_nor'
+ *
+ * Determine current address mode by reading SR1 with different methods, then
+ * query CFR2V[7] to confirm. If determination is failed, force enter to 4-byte
+ * address mode.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int cypress_nor_set_addr_mode_nbytes(struct spi_nor *nor)
+{
+ struct spi_mem_op op;
+ u8 addr_mode_nbytes = 0;
+ bool is4byte;
+ int ret;
+
+ /*
+ * Read SR1 by RDSR1 and RDAR(3- AND 4-byte addr). Use write enable
+ * that sets bit-1 in SR1.
+ */
+ ret = cypress_nor_determine_addr_mode_by_sr1(nor, &addr_mode_nbytes,
+ true);
+ if (ret)
+ return ret;
+ if (!addr_mode_nbytes)
+ goto force_4byte;
+
+ /*
+ * Second iteration is to confirm the 'addr_mode_nbytes' determined by
+ * first iteration. Write enable is not used for this iteration.
+ */
+ ret = cypress_nor_determine_addr_mode_by_sr1(nor, &addr_mode_nbytes,
+ false);
+ if (ret)
+ return ret;
+ if (!addr_mode_nbytes)
+ goto force_4byte;
+
+ /*
+ * Query CFR2V and make sure no contradiction between determied address
+ * nbytes and CFR2V[7].
+ */
+ op = (struct spi_mem_op)
+ CYPRESS_NOR_RD_ANY_REG_OP(addr_mode_nbytes,
+ SPINOR_REG_CYPRESS_CFR2V, 0,
+ nor->bouncebuf);
+ ret = spi_nor_read_any_reg(nor, &op, nor->reg_proto);
+ if (ret)
+ return ret;
+
+ is4byte = (nor->bouncebuf[0] & SPINOR_REG_CYPRESS_CFR2_ADRBYT);
+ if ((is4byte && addr_mode_nbytes != 4) ||
+ (!is4byte && addr_mode_nbytes != 3))
+ goto force_4byte;
+
+ nor->params->addr_mode_nbytes = addr_mode_nbytes;
+
+ return 0;
+
+force_4byte:
+ ret = spi_nor_set_4byte_addr_mode(nor, true);
+ if (ret)
+ return ret;
+ nor->params->addr_mode_nbytes = 4;
+
+ return 0;
+}
+
/**
* cypress_nor_set_page_size() - Set page size which corresponds to the flash
* configuration.
@@ -227,9 +376,10 @@ s25fs256t_post_bfpt_fixup(struct spi_nor *nor,
struct spi_mem_op op;
int ret;
- /* 4-byte address mode is enabled by default */
- nor->params->addr_nbytes = 4;
- nor->params->addr_mode_nbytes = 4;
+ ret = cypress_nor_set_addr_mode_nbytes(nor);
+ if (ret)
+ return ret;
+ nor->params->addr_nbytes = nor->params->addr_mode_nbytes;
/* Read Architecture Configuration Register (ARCFN) */
op = (struct spi_mem_op)
@@ -280,6 +430,13 @@ s25hx_t_post_bfpt_fixup(struct spi_nor *nor,
const struct sfdp_parameter_header *bfpt_header,
const struct sfdp_bfpt *bfpt)
{
+ int ret;
+
+ ret = cypress_nor_set_addr_mode_nbytes(nor);
+ if (ret)
+ return ret;
+ nor->params->addr_nbytes = nor->params->addr_mode_nbytes;
+
/* Replace Quad Enable with volatile version */
nor->params->quad_enable = cypress_nor_quad_enable_volatile;
@@ -375,6 +532,13 @@ static int s28hx_t_post_bfpt_fixup(struct spi_nor *nor,
const struct sfdp_parameter_header *bfpt_header,
const struct sfdp_bfpt *bfpt)
{
+ int ret;
+
+ ret = cypress_nor_set_addr_mode_nbytes(nor);
+ if (ret)
+ return ret;
+ nor->params->addr_nbytes = nor->params->addr_mode_nbytes;
+
return cypress_nor_set_page_size(nor);
}
--
2.34.1
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