[bug report] mtd: rawnand: qcom: Implement exec_op()

[Dan Carpenter]

Hello Md Sadre Alam,

The patch 5c6a9518447e: "mtd: rawnand: qcom: Implement exec_op()"
from Jul 10, 2023 (linux-next), leads to the following Smatch static
checker warning:

	drivers/mtd/nand/raw/qcom_nandc.c:2725 qcom_read_status_exec()
	warn: inconsistent indenting

drivers/mtd/nand/raw/qcom_nandc.c
    2678 static int qcom_read_status_exec(struct nand_chip *chip,
    2679                                  const struct nand_subop *subop)
    2680 {
    2681         struct qcom_nand_host *host = to_qcom_nand_host(chip);
    2682         struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
    2683         struct nand_ecc_ctrl *ecc = &chip->ecc;
    2684         struct qcom_op q_op;
    2685         const struct nand_op_instr *instr = NULL;
    2686         unsigned int op_id = 0;
    2687         unsigned int len = 0;
    2688         int ret = 0, num_cw, i;
    2689         u32 flash_status;
    2690 
    2691         host->status = NAND_STATUS_READY | NAND_STATUS_WP;
    2692 
    2693         qcom_parse_instructions(chip, subop, &q_op);
    2694 
    2695         num_cw = nandc->exec_opwrite ? ecc->steps : 1;
    2696         nandc->exec_opwrite = false;
    2697 
    2698         nandc->buf_count = 0;
    2699         nandc->buf_start = 0;
    2700         host->use_ecc = false;
    2701 
    2702         clear_read_regs(nandc);
    2703         clear_bam_transaction(nandc);
    2704 
    2705         nandc_set_reg(chip, NAND_FLASH_CMD, q_op.cmd_reg);
    2706         nandc_set_reg(chip, NAND_EXEC_CMD, 1);
    2707 
    2708         write_reg_dma(nandc, NAND_FLASH_CMD, 1, NAND_BAM_NEXT_SGL);
    2709         write_reg_dma(nandc, NAND_EXEC_CMD, 1, NAND_BAM_NEXT_SGL);
    2710         read_reg_dma(nandc, NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL);
    2711 
    2712         ret = submit_descs(nandc);
    2713         if (ret) {
    2714                 dev_err(nandc->dev, "failure in submitting status descriptor\n");
    2715                 free_descs(nandc);
    2716                 goto err_out;
    2717         }
    2718         free_descs(nandc);
    2719 
    2720         nandc_read_buffer_sync(nandc, true);
    2721 
    2722         for (i = 0; i < num_cw; i++) {
    2723                 flash_status = le32_to_cpu(nandc->reg_read_buf[i]);
    2724 
--> 2725         if (flash_status & FS_MPU_ERR)
    2726                 host->status &= ~NAND_STATUS_WP;

Still part of the for loop.  Needs to be indented another tab.

    2727 
    2728         if (flash_status & FS_OP_ERR ||
    2729          (i == (num_cw - 1) && (flash_status & FS_DEVICE_STS_ERR)))
    2730                 host->status |= NAND_STATUS_FAIL;

Same.

    2731         }
    2732 
    2733         flash_status = host->status;
    2734         instr = q_op.data_instr;
    2735         op_id = q_op.data_instr_idx;
    2736         len = nand_subop_get_data_len(subop, op_id);
    2737         memcpy(instr->ctx.data.buf.in, &flash_status, len);
    2738 
    2739 err_out:
    2740         return ret;
    2741 }

regards,
dan carpenter