[PATCH v3 1/3] dt-bindings: mtd: Add AC5 specific binding

[Chris Packham]

Hi Miquel,

On 13/07/23 00:32, Miquel Raynal wrote:
> Hi Chris,
>
> chris.packham at alliedtelesis.co.nz wrote on Mon,  3 Jul 2023 15:50:42
> +1200:
>
>> Add binding for AC5 SoC. This SoC only supports NAND SDR timings up to
>> mode 3 so a specific compatible value is needed.
>>
>> Signed-off-by: Chris Packham <chris.packham at alliedtelesis.co.nz>
>> Acked-by: Conor Dooley <conor.dooley at microchip.com>
> I need DT-binding maintainer's ack to take this patch, but this commit
> did not receive feedback (positive of negative) from them and is no
> longer in their patchwork. Can you please resend the series?

Conor's ack was provided on

https://lore.kernel.org/linux-mtd/20230626-immunity-lagged-eaae0182ad0c@spud/

Is this sufficient? I'm happy to resend if needed.

>
> The other patches LGTM.
>
>
>> ---
>>
>> Notes:
>>      Changes in v3:
>>      - Collect ack from Conor
>>      Changes in v2:
>>      - Keep compatibles in alphabetical order
>>      - Explain AC5 limitations in commit message
>>
>>   .../devicetree/bindings/mtd/marvell,nand-controller.yaml         | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml
>> index a10729bb1840..1ecea848e8b9 100644
>> --- a/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml
>> +++ b/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml
>> @@ -16,6 +16,7 @@ properties:
>>             - const: marvell,armada-8k-nand-controller
>>             - const: marvell,armada370-nand-controller
>>         - enum:
>> +          - marvell,ac5-nand-controller
>>             - marvell,armada370-nand-controller
>>             - marvell,pxa3xx-nand-controller
>>         - description: legacy bindings
>
> Thanks,
> Miquèl