[PATCH v11 07/10] mtd: spi-nor: Add stacked memories support in spi-nor

Tudor Ambarus tudor.ambarus at linaro.org
Thu Dec 7 09:24:48 PST 2023



On 11/25/23 09:21, Amit Kumar Mahapatra wrote:
> The current implementation assumes that a maximum of two flashes are
> connected in stacked mode and both the flashes are of same make but can
> differ in sizes. So, except the sizes all other flash parameters of both
> the flashes are identical.

Too much restrictions, isn't it? Have you thought about adding a layer
on top of SPI NOR managing the stacked/parallel flashes?



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