[PATCH v2 4/4] spi: cadence-quadspi: use STIG mode for small reads

[Yoshitaka Ikeda]

Hi Dhruva,

> Please can you send me the register fields information for the CQSPI
> controller used in this device?
> I wanted to verify if atall there were any mismatch between the controller I
> have tested with vs your SOC's controller.

You can find it in the pdf that can be obtained by pressing the download button in the upper right corner of the following website.
- https://www.intel.com/content/www/us/en/docs/programmable/683126/15-0/introduction.html

The description is as follows:
- 15. Quad SPI Flash
  - Quad SPI Flash Controller Address Map and Register Definitions

-- 
Thanks and Regards,
Yoshitaka Ikeda