[PATCH v3 1/1] mtd: spi-nor: micron-st: Enable locking for mt25qu256a

[Michael Walle]

Am 2022-10-20 11:20, schrieb Eliav Farber:
> mt25qu256a [1] uses the 4 bit Block Protection scheme and supports
> Top/Bottom protection via the BP and TB bits of the Status Register.
> BP3 is located in bit 6 of the Status Register.
> Tested on MT25QU256ABA8ESF-0SIT.
> 
> [1] 
> https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_u_256_aba_0.pdf
> 
> Signed-off-by: Eliav Farber <farbere at amazon.com>
> Link: 
> https://lore.kernel.org/lkml/20221019071631.15191-1-farbere@amazon.com

Reviewed-by: Michael Walle <michael at walle.cc>

Thanks,
-michael