[PATCH 0/2] These are the required patches I found while adding

Michael Walle michael at walle.cc
Thu Nov 24 04:42:30 PST 2022


Am 2022-11-24 12:47, schrieb Nathan Barrett-Morrison:
> Ah yes, I just realized we're effectively using the device in 1S-1S-8S
> extended SPI mode, so the 0xC7 setting is probably not required.  We
> were never able to get DTR mode working on the IS25LX256. I can fix
> this patch up so it's more explicit about what's going on here.
> The 8S-8S-8S support in core.c is still going to be used for another
> OSPI device I'm porting over from an older kernel.

Can you link a datasheet? The problem with 8s8s8s is that it needs
mode switching which can be footgun. And IMHO it doesn't provide
significant performance improvements over 1s8s8s.

> Would you like me to separate these patches, fix up the ISSI once, and 
> resubmit?

Yes please. Also, I've seen that you use flags in the flash_info table.
Please have a look if that information can be deduced from the SFDP. 
does a flash describe if it supports 1s1s8s.


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