[PATCH 0/2] These are the required patches I found while adding
michael at walle.cc
Thu Nov 24 00:07:06 PST 2022
Am 2022-11-23 22:13, schrieb Nathan Barrett-Morrison:
> 1) The core framework needs some additional logic for 8S-8S-8S to pass
> 2) The IS25LX256 chip needs added to the SPI part table along with
> various fixups
Unfortunately, I can't make any sense of this series. First of all, the
IS25LX256  doesn't support 8S-8S-8S, only 8D-8D-8D and 1S-8S-8S, see
ch. 4. Confused, I've looked at your octal str enable function and it
0xc7 to the volatile configuration register 0x00. According to the
that is the enable for the octal DTR mode.
Please explain your problem and your motivation in the cover
message and how you fix it.
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