[PATCH v2] mtd: spi-nor: gigadevice: Add support for gd25lr256e
Tudor.Ambarus at microchip.com
Tudor.Ambarus at microchip.com
Tue Nov 22 03:59:47 PST 2022
On 11/22/22 13:22, Mika Westerberg wrote:
cut
>> Here's the simple test:
>>
>> Run the test_qspi.sh script:
>> #!/bin/sh
>>
>> dd if=/dev/urandom of=./qspi_test bs=1M count=6
>> mtd_debug write /dev/mtd5 0 6291456 qspi_test
>> mtd_debug erase /dev/mtd5 0 6291456
>> mtd_debug read /dev/mtd5 0 6291456 qspi_read
>> hexdump qspi_read
>> mtd_debug write /dev/mtd5 0 6291456 qspi_test
>> mtd_debug read /dev/mtd5 0 6291456 qspi_read
>> sha1sum qspi_test qspi_read
>>
>> The two SHA-1 sums must be the same to pass this test.
>
> That SPI flash holds the system BIOS and I'm using it remotely now so
> there is no way to revive if something goes wrong so I wonder if it is
> OK to skip the above step?
sure, it's fine, yes. Did you test the locking part of your patch?
I'm asking because if you don't need the locking or you're not able to test
it, then you can use the spi-nor-generic driver introduced by Michael at
[1] and you won't need an entry for the flash at all.
>
cut
> These I was able to read:
>
> # cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
> gd25lr256e
> # cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
> c86719
> # cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
> gigadevice
> # xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
> 53464450060103ff00060110300000ffc8000103900000ff84000102c000
> 00ff03000102e00000ffffffffffffffffffe520eaffffffff0f44eb086b
> 003b00bbfeffffffffff00ffffff44eb0c200f5210d800ff4362c9fe82e9
> 9c58ec6006337a757a7504bdd55c2906740008500001ffffffffffffffff
> ffffffffffffffffffffffffffffffffffffffffffffffff002050169df9
> 8156d9c8ffffffffffffffffffffffffffffffffffffffffffffffffffff
> fffffffffffffffffffffffff38ff0ff215cdcffffffffffffffffffffff
> ffffffffffffffffffffffffffff389b96f0e1a6b2ff
Okay, thanks.
[1] https://lore.kernel.org/linux-mtd/166903807811.85501.6803386075881922742.b4-ty@microchip.com/T/#t
--
Cheers,
ta
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