[PATCH v2 2/9] mtd: spi-nor: Introduce the concept of bank

Miquel Raynal miquel.raynal at bootlin.com
Mon Nov 21 00:26:54 PST 2022

Hi Pratyush,

pratyush at kernel.org wrote on Sun, 20 Nov 2022 17:11:35 +0100:

> On 10/11/22 04:55PM, Miquel Raynal wrote:
> > SPI-NOR chips are made of pages, which gathered in small groups make
> > (erase) sectors. Sectors, gathered together, make banks inside the
> > chip. So far there was only one bank per device supported, but we are
> > about to introduce support for new chips featuring several banks (up to
> > 4 so far) where different operations may happen in parallel.
> > 
> > Let's allow describing these additional bank parameters.  
> Just to be sure, are the multiple banks still used via a single Chip 
> Select, or do we need multi-CS support for this as well? I do remember 
> seeing an RFC about multi-CS support from you some time back and I am 
> not sure if that is related.

I confirm this is not related to the multi-CS binding I worked on
earlier. All the banks I am talking about are expected to be used via a
single CS.

> Reviewed-by: Pratyush Yadav <pratyush at kernel.org>

Thanks for the reviews!


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