[PATCH v15 2/8] mtd: spi-nor: core: Shrink the storage size of the flash_info's addr_nbytes

Pratyush Yadav p.yadav at ti.com
Tue May 31 04:14:17 PDT 2022


On 10/05/22 07:10AM, tkuw584924 at gmail.com wrote:
> From: Tudor Ambarus <tudor.ambarus at microchip.com>
> 
> The maximum number of address bytes in SPI NOR is 4. Shrink the storage
> size of the flash_info's addr_nbytes.
> 
> Signed-off-by: Tudor Ambarus <tudor.ambarus at microchip.com>

Reviewed-by: Pratyush Yadav <p.yadav at ti.com>

-- 
Regards,
Pratyush Yadav
Texas Instruments Inc.



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