[PATCH] mtd: spi-nor: support eon en25qh256a variant
Michael Walle
michael at walle.cc
Mon May 9 00:21:12 PDT 2022
Hi,
For the next time if you submit a new patch version: the subject should
contain v2, eg. [PATCH v2]. See
Documentation/process/submitting-patches.rst.
Also a changelog would be good.
Am 2022-05-03 01:33, schrieb Leon M. George:
> This patch allows accessing the upper 16m on the A variant (EN25QH256A)
> of
> the EN25QH256 that shares same JEDEC ID.
>
> Without this patch, addr_with is detected to be '4' but the read_opcode
> is
> a plain READ (supporting only 3 byte addresses).
> Setting PARSE_SFDP is enough to detect the read_opcode READ_4B on the A
> variant. READ_4B is not available on the no-A variant.
>
> Both variants support 4-byte address mode (spi_nor_set_4byte_addr_mode)
> but that is prone to breaking on unexpected reboots if the reset pin
> isn't
> connected (broken-flash-reset).
>
> The no-A variant supports a 'high bank latch mode' that affects read,
> program, and erase commands - similar to the extended address register
> (EAR).
> The HBL bit is manipulated using the ENHBL (0x67) and EXHBL (0x98)
> opcodes.
>
> Should it become necessary to distinguish the two variants in the
> future,
> the A variant sets the SNOR_HWCAPS_READ_1_1_4 SFDP param - the no-A
> variant doesn't.
>
> Tested with and without fast read on the A variant only.
>
> Signed-off-by: Leon M. George <leon at georgemail.eu>
Reviewed-by: Michael Walle <michael at walle.cc>
-michael
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