[PATCH v14 2/8] mtd: spi-nor: core: Shrink the storage size of the flash_info's addr_nbytes
Tudor.Ambarus at microchip.com
Tudor.Ambarus at microchip.com
Tue May 3 01:35:33 PDT 2022
On 5/3/22 11:27, Tudor.Ambarus at microchip.com wrote:
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> On 5/3/22 11:16, Tudor Ambarus wrote:
>> The maximum number of address bytes in SPI NOR is 4. Shrink the storage
>> size of the flash_info's addr_nbytes.
>>
>> Signed-off-by: Tudor Ambarus <tudor.ambarus at microchip.com>
>> ---
>> drivers/mtd/spi-nor/core.h | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
>> index 5fc3d4a8add1..fe7683fe1b4d 100644
>> --- a/drivers/mtd/spi-nor/core.h
>> +++ b/drivers/mtd/spi-nor/core.h
>> @@ -493,7 +493,7 @@ struct flash_info {
>> unsigned sector_size;
>> u16 n_sectors;
>> u16 page_size;
>> - u16 addr_nbytes;
>> + u8 addr_nbytes;
>
> I think we can remove the nor->info->addr_nbytes entirely if we choose
> to add late_init hooks instead for those couple of flashes that use it.
> This will shrink the size for the big array of patches that we have.
a/patches/flashes :) Also we should consider struct padding sooner or later.
> Opinions?
>
> Thanks,
> ta
>>
>> bool parse_sfdp;
>> u16 flags;
>
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