[PATCH v5 1/4] dt-bindings: nand: meson: fix meson nfc clock

[Rob Herring]

On Fri, 13 May 2022 20:34:01 +0800, Liang Yang wrote:
> EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK'
> which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is
> the divider and bit6~7 is the mux for fix pll and xtal. At the beginning,
> a common MMC and NAND sub-clock was discussed and planed to be implemented
> as NFC clock provider, but now this series of patches of a common MMC and
> NAND sub-clock are never being accepted and the current binding was never
> valid. the reasons are:
> 1. EMMC and NAND, which are mutually exclusive anyway
> 2. coupling the EMMC and NAND.
> 3. it seems that a common MMC and NAND sub-clock is over engineered.
> and let us see the link for more information:
> https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com
> so The meson nfc can't work now, let us rework the clock.
> 
> Signed-off-by: Liang Yang <liang.yang at amlogic.com>
> ---
>  .../bindings/mtd/amlogic,meson-nand.txt       | 29 ++++++++-----------
>  1 file changed, 12 insertions(+), 17 deletions(-)
> 

Acked-by: Rob Herring <robh at kernel.org>