[PATCH v10 13/13] spi: mxic: Add support for pipelined ECC operations

Miquel Raynal miquel.raynal at bootlin.com
Mon Jan 31 08:21:42 PST 2022


On Thu, 2022-01-27 at 09:18:08 UTC, Miquel Raynal wrote:
> Some SPI-NAND chips do not have a proper on-die ECC engine providing
> error correction/detection. This is particularly an issue on embedded
> devices with limited resources because all the computations must
> happen in software, unless an external hardware engine is provided.
> 
> These external engines are new and can be of two categories: external
> or pipelined. Macronix is providing both, the former being already
> supported. The second, however, is very SoC implementation dependent
> and must be instantiated by the SPI host controller directly.
> 
> An entire subsystem has been contributed to support these engines which
> makes the insertion into another subsystem such as SPI quite
> straightforward without the need for a lot of specific functions.
> 
> Signed-off-by: Miquel Raynal <miquel.raynal at bootlin.com>
> Reviewed-by: Mark Brown <broonie at kernel.org>
> Link: https://lore.kernel.org/linux-mtd/20220104083631.40776-14-miquel.raynal@bootlin.com

Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git spi-mem-ecc.

Miquel



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