[PATCH V4] mtd: spi-nor: winbond: Add support for winbond chip

[Sajida Bhanu (Temp) (QUIC)]

-----Original Message-----
From: Michael Walle <michael at walle.cc> 
Sent: Thursday, January 20, 2022 4:02 PM
To: Sajida Bhanu (Temp) (QUIC) <quic_c_sbhanu at quicinc.com>
Cc: dianders at chromium.org; tudor.ambarus at microchip.com; p.yadav at ti.com; miquel.raynal at bootlin.com; richard at nod.at; vigneshr at ti.com; linux-mtd at lists.infradead.org; linux-kernel at vger.kernel.org; stummala at codeaurora.org; vbadigan at codeaurora.org; Ram Prakash Gupta (QUIC) <quic_rampraka at quicinc.com>; Pradeep Pragallapati (QUIC) <quic_pragalla at quicinc.com>; sartgarg at codeaurora.org
Subject: Re: [PATCH V4] mtd: spi-nor: winbond: Add support for winbond chip

Hi,

Am 2022-01-20 10:54, schrieb Shaik Sajida Bhanu:
> Add support for winbond W25Q512NW-IM chip.
> 
> Signed-off-by: Shaik Sajida Bhanu <quic_c_sbhanu at quicinc.com>
> Reviewed-by: Doug Anderson <dianders at chromium.org>
> ---
> 
> Changes since V1:
> 	- Added space before name of the flash part as suggested by Doug.
> 
> Changes since V2:
> 	- Updated chip name as w25q512nwm as suggested by Doug.
> 
> Changes since V3:
> 	- Updated flash_info flags passing according to below patch

Thanks!

Please note, that you also have to supply a SFDP dump, see [1].

> https://lore.kernel.org/all/20211207140254.87681-7-tudor.ambarus@microchip.com/
> 	 As suggested by Tudor Ambarus.
> ---
>  drivers/mtd/spi-nor/winbond.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/winbond.c 
> b/drivers/mtd/spi-nor/winbond.c index 675f32c..c4be225 100644
> --- a/drivers/mtd/spi-nor/winbond.c
> +++ b/drivers/mtd/spi-nor/winbond.c
> @@ -124,6 +124,10 @@ static const struct flash_info winbond_parts[] = {
>  	{ "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024)
>  		NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ |
>  			      SPI_NOR_DUAL_READ) },
> +	{ "w25q512nwm", INFO(0xef8020, 0, 64 * 1024, 1024)
> +		FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> +		NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
> +			      SPI_NOR_QUAD_READ) },

Could you try adding OTP_INFO(256, 3, 0x1000, 0x1000), this should enable OTP support. Could you please test this using the flash_otp_{dump,info,erase,write} tools and add that line?

I've checked ID duplications, because there is the w25qNNjw series. There doesn't seem to exist a w25q512jw, so we are safe for now. There is only a w25q512jv and it has the id 0xef4020.

fun fact.. the w25q512nwm describes the OTP lock bit for the first OTP region (the one which is not documented and I've found out that its used for storing the SFDP) as SFDP lock bit. See ch "7.1.1 Security Register Lock Bits (LB3, LB2, LB1, SFDP Lock bit)". So we finally have evidence :)

-michael

Hi,

Thanks for the review.. 

Can you please share the documentation about OTP_INFO settings(Advantages etc..) if any.

Can you please share more info on  flash_otp_{dump,info,erase,write} tools.

Thanks,
Sajida

[1]
https://lore.kernel.org/linux-mtd/4304e19f3399a0a6e856119d01ccabe0@walle.cc/