[PATCH] mtd: cfi_cmdset_0002: Use chip_ready() for write on S29GL064N
Vignesh Raghavendra
vigneshr at ti.com
Mon Feb 28 07:34:52 PST 2022
Hi,
On 14/02/22 11:50 pm, Tokunori Ikegami wrote:
> The regression issue has been caused on S29GL064N and reported it.
> Also the change mentioned is to use chip_good() for buffered write.
> So disable the change on S29GL064N and use chip_ready() as before.
>
> Fixes: dfeae1073583("mtd: cfi_cmdset_0002: Change write buffer to check correct value")
> Signed-off-by: Tokunori Ikegami <ikegami.t at gmail.com>
> Tested-by: Ahmad Fatoum <a.fatoum at pengutronix.de>
> Cc: linux-mtd at lists.infradead.org
> Cc: stable at vger.kernel.org
> ---
Thanks for working on the fix.
Please CC maintainers from
./scripts/get_maintainer.pl -f drivers/mtd/chips/cfi_cmdset_0002.c
Else, patch would not get attention in time.
> drivers/mtd/chips/cfi_cmdset_0002.c | 105 ++++++++++++++++------------
> 1 file changed, 59 insertions(+), 46 deletions(-)
>
> diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
> index a761134fd3be..a0dfc8ace899 100644
> --- a/drivers/mtd/chips/cfi_cmdset_0002.c
> +++ b/drivers/mtd/chips/cfi_cmdset_0002.c
> @@ -48,6 +48,7 @@
> #define SST49LF040B 0x0050
> #define SST49LF008A 0x005a
> #define AT49BV6416 0x00d6
> +#define S29GL064N_MN12 0x0c01
>
> /*
> * Status Register bit description. Used by flash devices that don't
> @@ -109,6 +110,8 @@ static struct mtd_chip_driver cfi_amdstd_chipdrv = {
> .module = THIS_MODULE
> };
>
> +static bool use_chip_good_for_write;
> +
Can we use per device private flag? Else this wont work on systems with
multiple CFI flashes with one of them being S29GL064N_MN12.
> /*
> * Use status register to poll for Erase/write completion when DQ is not
> * supported. This is indicated by Bit[1:0] of SoftwareFeatures field in
> @@ -283,6 +286,17 @@ static void fixup_use_write_buffers(struct mtd_info *mtd)
> }
> #endif /* !FORCE_WORD_WRITE */
>
> +static void fixup_use_chip_good_for_write(struct mtd_info *mtd)
> +{
> + struct map_info *map = mtd->priv;
> + struct cfi_private *cfi = map->fldrv_priv;
> +
> + if (cfi->mfr == CFI_MFR_AMD && cfi->id == S29GL064N_MN12)
> + return;
> +
> + use_chip_good_for_write = true;
> +}
> +
> /* Atmel chips don't use the same PRI format as AMD chips */
> static void fixup_convert_atmel_pri(struct mtd_info *mtd)
> {
> @@ -462,7 +476,7 @@ static struct cfi_fixup cfi_fixup_table[] = {
> { CFI_MFR_AMD, 0x0056, fixup_use_secsi },
> { CFI_MFR_AMD, 0x005C, fixup_use_secsi },
> { CFI_MFR_AMD, 0x005F, fixup_use_secsi },
> - { CFI_MFR_AMD, 0x0c01, fixup_s29gl064n_sectors },
> + { CFI_MFR_AMD, S29GL064N_MN12, fixup_s29gl064n_sectors },
> { CFI_MFR_AMD, 0x1301, fixup_s29gl064n_sectors },
> { CFI_MFR_AMD, 0x1a00, fixup_s29gl032n_sectors },
> { CFI_MFR_AMD, 0x1a01, fixup_s29gl032n_sectors },
> @@ -474,6 +488,7 @@ static struct cfi_fixup cfi_fixup_table[] = {
> #if !FORCE_WORD_WRITE
> { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers },
> #endif
> + { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_chip_good_for_write },
> { 0, 0, NULL }
> };
> static struct cfi_fixup jedec_fixup_table[] = {
> @@ -801,42 +816,61 @@ static struct mtd_info *cfi_amdstd_setup(struct mtd_info *mtd)
> return NULL;
> }
>
> -/*
> - * Return true if the chip is ready.
> - *
> - * Ready is one of: read mode, query mode, erase-suspend-read mode (in any
> - * non-suspended sector) and is indicated by no toggle bits toggling.
> - *
> - * Note that anything more complicated than checking if no bits are toggling
> - * (including checking DQ5 for an error status) is tricky to get working
> - * correctly and is therefore not done (particularly with interleaved chips
> - * as each chip must be checked independently of the others).
> - */
> -static int __xipram chip_ready(struct map_info *map, struct flchip *chip,
> - unsigned long addr)
> +static int __xipram chip_check(struct map_info *map, struct flchip *chip,
> + unsigned long addr, map_word *expected)
> {
> struct cfi_private *cfi = map->fldrv_priv;
> - map_word d, t;
> + map_word oldd, curd;
> + int ret;
>
> if (cfi_use_status_reg(cfi)) {
> map_word ready = CMD(CFI_SR_DRB);
> +
Unrelated change?
> /*
> * For chips that support status register, check device
> * ready bit
> */
> cfi_send_gen_cmd(0x70, cfi->addr_unlock1, chip->start, map, cfi,
> cfi->device_type, NULL);
> - d = map_read(map, addr);
> + curd = map_read(map, addr);
>
> - return map_word_andequal(map, d, ready, ready);
> + return map_word_andequal(map, curd, ready, ready);
> }
>
> - d = map_read(map, addr);
> - t = map_read(map, addr);
> + oldd = map_read(map, addr);
> + curd = map_read(map, addr);
> +
> + ret = map_word_equal(map, oldd, curd);
> +
> + if (!ret || !expected)
> + return ret;
Why even read oldd and curd if !expected ?
> +
> + return map_word_equal(map, curd, *expected);
> +}
> +
> +static int __xipram chip_good_for_write(struct map_info *map,
> + struct flchip *chip, unsigned long addr,
> + map_word expected)
> +{
> + if (use_chip_good_for_write)
> + return chip_check(map, chip, addr, &expected);
>
> - return map_word_equal(map, d, t);
> + return chip_check(map, chip, addr, NULL);
> }
>
> +/*
> + * Return true if the chip is ready.
> + *
> + * Ready is one of: read mode, query mode, erase-suspend-read mode (in any
> + * non-suspended sector) and is indicated by no toggle bits toggling.
> + *
> + * Note that anything more complicated than checking if no bits are toggling
> + * (including checking DQ5 for an error status) is tricky to get working
> + * correctly and is therefore not done (particularly with interleaved chips
> + * as each chip must be checked independently of the others).
> + */
> +#define chip_ready(map, chip, addr) chip_check(map, chip, addr, NULL)
> +
> /*
> * Return true if the chip is ready and has the correct value.
> *
> @@ -855,28 +889,7 @@ static int __xipram chip_ready(struct map_info *map, struct flchip *chip,
> static int __xipram chip_good(struct map_info *map, struct flchip *chip,
> unsigned long addr, map_word expected)
> {
> - struct cfi_private *cfi = map->fldrv_priv;
> - map_word oldd, curd;
> -
> - if (cfi_use_status_reg(cfi)) {
> - map_word ready = CMD(CFI_SR_DRB);
> -
> - /*
> - * For chips that support status register, check device
> - * ready bit
> - */
> - cfi_send_gen_cmd(0x70, cfi->addr_unlock1, chip->start, map, cfi,
> - cfi->device_type, NULL);
> - curd = map_read(map, addr);
> -
> - return map_word_andequal(map, curd, ready, ready);
> - }
> -
> - oldd = map_read(map, addr);
> - curd = map_read(map, addr);
> -
> - return map_word_equal(map, oldd, curd) &&
> - map_word_equal(map, curd, expected);
> + return chip_check(map, chip, addr, &expected);
> }
>
> static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr, int mode)
> @@ -1699,7 +1712,7 @@ static int __xipram do_write_oneword_once(struct map_info *map,
> * "chip_good" to avoid the failure due to scheduling.
> */
> if (time_after(jiffies, timeo) &&
> - !chip_good(map, chip, adr, datum)) {
> + !chip_good_for_write(map, chip, adr, datum)) {
> xip_enable(map, chip, adr);
> printk(KERN_WARNING "MTD %s(): software timeout\n", __func__);
> xip_disable(map, chip, adr);
> @@ -1707,7 +1720,7 @@ static int __xipram do_write_oneword_once(struct map_info *map,
> break;
> }
>
> - if (chip_good(map, chip, adr, datum)) {
> + if (chip_good_for_write(map, chip, adr, datum)) {
> if (cfi_check_err_status(map, chip, adr))
> ret = -EIO;
> break;
> @@ -1979,14 +1992,14 @@ static int __xipram do_write_buffer_wait(struct map_info *map,
> * "chip_good" to avoid the failure due to scheduling.
> */
> if (time_after(jiffies, timeo) &&
> - !chip_good(map, chip, adr, datum)) {
> + !chip_good_for_write(map, chip, adr, datum)) {
> pr_err("MTD %s(): software timeout, address:0x%.8lx.\n",
> __func__, adr);
> ret = -EIO;
> break;
> }
>
> - if (chip_good(map, chip, adr, datum)) {
> + if (chip_good_for_write(map, chip, adr, datum)) {
> if (cfi_check_err_status(map, chip, adr))
> ret = -EIO;
> break;
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