[PATCH v8 2/3] mtd: spi-nor: spansion: Add support for volatile QE bit
Pratyush Yadav
p.yadav at ti.com
Thu Feb 24 23:16:48 PST 2022
On 21/02/22 04:14PM, tkuw584924 at gmail.com wrote:
> From: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>
>
> Some of Infineon chips support volatile version of configuration registers
> and it is recommended to update volatile registers in the field application
> due to a risk of the non-volatile registers corruption by power interrupt.
>
> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>
> ---
> Changes in v8:
> - Use spi_nor_read/write_reg() functions
> - Use nor->bouncebuf instead of a variable on stack
>
> Changes in v7:
> - Add missing macro definitions in v6
>
> Changes in v6:
> - Remove multi die package support
>
> Changes in v5:
> - No change
>
> Changes in v4:
> - No change
>
> Changes in v3:
> - Add multi-die package parts support
>
> drivers/mtd/spi-nor/spansion.c | 61 ++++++++++++++++++++++++++++++++++
> 1 file changed, 61 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
> index 9040edf7359f..5453b89a1c22 100644
> --- a/drivers/mtd/spi-nor/spansion.c
> +++ b/drivers/mtd/spi-nor/spansion.c
> @@ -10,6 +10,8 @@
>
> #define SPINOR_OP_RD_ANY_REG 0x65 /* Read any register */
> #define SPINOR_OP_WR_ANY_REG 0x71 /* Write any register */
> +#define SPINOR_REG_CYPRESS_CFR1V 0x00800002
> +#define SPINOR_REG_CYPRESS_CFR1V_QUAD_EN BIT(1) /* Quad Enable */
You might have to rename function and variable names based on mwalle's
patches [0], depending on which series goes in first.
Other than this,
Reviewed-by: Pratyush Yadav <p.yadav at ti.com>
> #define SPINOR_REG_CYPRESS_CFR2V 0x00800003
> #define SPINOR_REG_CYPRESS_CFR2V_MEMLAT_11_24 0xb
> #define SPINOR_REG_CYPRESS_CFR3V 0x00800004
> @@ -105,6 +107,65 @@ static int spi_nor_cypress_octal_dtr_dis(struct spi_nor *nor)
> return 0;
> }
>
> +/**
> + * spansion_quad_enable_volatile() - enable Quad I/O mode in volatile register.
> + * @nor: pointer to a 'struct spi_nor'
> + * @reg_dummy: number of dummy bytes for register read
> + *
> + * It is recommended to update volatile registers in the field application due
> + * to a risk of the non-volatile registers corruption by power interrupt. This
> + * function sets Quad Enable bit in CFR1 volatile. If users set the Quad Enable
> + * bit in the CFR1 non-volatile in advance (typically by a Flash programmer
> + * before mounting Flash on PCB), the Quad Enable bit in the CFR1 volatile is
> + * also set during Flash power-up. This function supports multi-die package
> + * parts that require to set the Quad Enable bit in each die.
> + *
> + * Return: 0 on success, -errno otherwise.
> + */
> +static int spansion_quad_enable_volatile(struct spi_nor *nor, u8 reg_dummy)
> +{
> + struct spi_mem_op op;
> + u32 reg_addr = SPINOR_REG_CYPRESS_CFR1V;
> + u8 cfr1v_written;
> + int ret;
> +
> + op = (struct spi_mem_op)
> + SPI_NOR_SPANSION_RD_ANY_REG_OP(nor->addr_width, reg_addr,
> + reg_dummy, 1, nor->bouncebuf);
> + ret = spi_nor_read_reg(nor, &op, SNOR_PROTO_1_1_1);
> + if (ret)
> + return ret;
> +
> + if (nor->bouncebuf[0] & SPINOR_REG_CYPRESS_CFR1V_QUAD_EN)
> + return 0;
> +
> + /* Update the Quad Enable bit. */
> + nor->bouncebuf[0] |= SPINOR_REG_CYPRESS_CFR1V_QUAD_EN;
> + op = (struct spi_mem_op)
> + SPI_NOR_SPANSION_WR_ANY_REG_OP(nor->addr_width, reg_addr,
> + 1, nor->bouncebuf);
> + ret = spi_nor_write_reg(nor, &op, SNOR_PROTO_1_1_1);
> + if (ret)
> + return ret;
> +
> + cfr1v_written = nor->bouncebuf[0];
> +
> + /* Read back and check it. */
> + op = (struct spi_mem_op)
> + SPI_NOR_SPANSION_RD_ANY_REG_OP(nor->addr_width, reg_addr,
> + reg_dummy, 1, nor->bouncebuf);
> + ret = spi_nor_read_reg(nor, &op, SNOR_PROTO_1_1_1);
> + if (ret)
> + return ret;
> +
> + if (nor->bouncebuf[0] != cfr1v_written) {
> + dev_err(nor->dev, "CFR1: Read back test failed\n");
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> /**
> * spi_nor_cypress_octal_dtr_enable() - Enable octal DTR on Cypress flashes.
> * @nor: pointer to a 'struct spi_nor'
> --
> 2.25.1
>
[0] https://patchwork.ozlabs.org/project/linux-mtd/patch/20220223134358.1914798-13-michael@walle.cc/
--
Regards,
Pratyush Yadav
Texas Instruments Inc.
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