[PATCH 0/4] enabling Advanced protection and security features

[Richard Weinberger]

----- Ursprüngliche Mail -----
> Von: "shiva linuxworks" <shiva.linuxworks at gmail.com>
> An: "Tudor Ambarus" <tudor.ambarus at microchip.com>, "Michael Walle" <michael at walle.cc>, "Pratyush Yadav"
> <p.yadav at ti.com>, "Miquel Raynal" <miquel.raynal at bootlin.com>, "richard" <richard at nod.at>, "Vignesh Raghavendra"
> <vigneshr at ti.com>
> CC: "linux-mtd" <linux-mtd at lists.infradead.org>, "linux-kernel" <linux-kernel at vger.kernel.org>, "Shivamurthy Shastri"
> <sshivamurthy at micron.com>
> Gesendet: Mittwoch, 27. Oktober 2021 12:33:48
> Betreff: [PATCH 0/4] enabling Advanced protection and security features

> From: Shivamurthy Shastri <sshivamurthy at micron.com>
> 
> Standard protection features in SPI NOR flashes are legacy and offer a
> simple way to protect the memory array against accidental or unwanted
> modification of its content.
> 
> These patches enable the support for advanced sector protection which
> protects memory from accidentally corrupting code and data stored, and
> it also prevents malicious attacks that could intentionally modify the
> code or data stored in the memory.
> 
> Micron Flashes offer some of the advanced protection methods using
> volatile lock bits, non-volatile lock bits, global freeze bits, and
> password.

Can you please point us to the technical documentation of these features?
I'm especially interested in the password feature.

Thanks,
//richard