GPMI iMX6ull timeout on DMA

[Miquel Raynal]

Hi Christian,

ceggers at arri.de wrote on Fri, 8 Oct 2021 15:49:21 +0200:

> On Friday, 8 October 2021, 15:36:31 CEST, Miquel Raynal wrote:
> > 
> > miquel.raynal at bootlin.com wrote on Fri, 8 Oct 2021 15:29:05 +0200:
> >   
> > > 
> > > If this clock (as I understand) does not prevent us to access the
> > > registers but only feeds the external NAND bus part, then there is no
> > > need to enable it in the probe, just acquiring it will be enough.  
> 
> clocks[0] is "gpmi_io" which sounds more like i/o than registers. So lets
> try to remove the initial call to clk_set_rate().
> 
> > > Then, the first call for an IO operation with ->must_apply_timings
> > > should:
> > > 
> > > 	if (imx6)
> > > 		disable_clk();
> > > 
> > > 	clk_set_rate();
> > > 
> > > 	if (imx6)
> > > 		enable_clk();  
> 
> Do you think that the need for avoiding clock glitches is i.MX6 specific?
> The errata I mentioned is specific for the bootloader software, but (I think)
> the requirement for switching off the clocks gates prior changing the dividers
> may apply also for other series.

I honestly don't know, perhaps Han have more details about it. If you
think it's a wider issue, then we can just do the disable/enable step
without any further checks.

> > Actually we should ensure clks are enabled in the !imx6 case anyway,
> > but this is needed only once so either we keep enabling the clock in
> > the probe or we check here if the clk has already been enabled or not.  
> The clocks are already enabled (and kept on) in probe. The initial call to
> clk_set_rate() is just above this (but the clocks are not disabled at this
> stage as all gates have been enabled by the boot loader).

The IO clock should be enabled and set to a particular rate the first
time the die is selected to perform a NAND operation, or when we switch
from one device to the other (this does not apply to the GPMI driver
for now). So we can drop the enable/set_rate call in the probe if the
assumption that this clock only feeds the external bus is right.

Thanks,
Miquèl