[PATCH 1/4] mtd: spinand: Add support continuous read mode
Zhengxun
zhengxunli.mxic at gmail.com
Thu Oct 7 23:57:56 PDT 2021
The patch supports setting the "CONT" bit of the configuration
register and adding a continuous read mode flag for identification.
Signed-off-by: Zhengxun <zhengxunli.mxic at gmail.com>
---
drivers/mtd/nand/spi/core.c | 17 +++++++++++++++++
include/linux/mtd/spinand.h | 2 ++
2 files changed, 19 insertions(+)
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 2c8685f..bcdd438 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -193,6 +193,23 @@ static int spinand_init_quad_enable(struct spinand_device *spinand)
enable ? CFG_QUAD_ENABLE : 0);
}
+static int spinand_continuous_read_enable(struct spinand_device *spinand)
+{
+ if (!(spinand->flags & SPINAND_HAS_CONT_READ_BIT))
+ return 0;
+
+ return spinand_upd_cfg(spinand, CFG_CONT_READ_ENABLE,
+ CFG_CONT_READ_ENABLE);
+}
+
+static int spinand_continuous_read_disable(struct spinand_device *spinand)
+{
+ if (!(spinand->flags & SPINAND_HAS_CONT_READ_BIT))
+ return 0;
+
+ return spinand_upd_cfg(spinand, CFG_CONT_READ_ENABLE, 0);
+}
+
static int spinand_ecc_enable(struct spinand_device *spinand,
bool enable)
{
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 6988956..04be10e 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -154,6 +154,7 @@
#define REG_CFG 0xb0
#define CFG_OTP_ENABLE BIT(6)
#define CFG_ECC_ENABLE BIT(4)
+#define CFG_CONT_READ_ENABLE BIT(2)
#define CFG_QUAD_ENABLE BIT(0)
/* status register */
@@ -307,6 +308,7 @@ struct spinand_ecc_info {
#define SPINAND_HAS_QE_BIT BIT(0)
#define SPINAND_HAS_CR_FEAT_BIT BIT(1)
+#define SPINAND_HAS_CONT_READ_BIT BIT(2)
/**
* struct spinand_ondie_ecc_conf - private SPI-NAND on-die ECC engine structure
--
2.7.4
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