[PATCH v2] mtd: spinand: gigadevice: Support GD5F1GQ5UExxG

[Miquel Raynal]

On Thu, 2021-02-11 at 11:36:19 UTC, Reto Schneider wrote:
> From: Reto Schneider <reto.schneider at husqvarnagroup.com>
> 
> The relevant changes to the already existing GD5F1GQ4UExxG support has
> been determined by consulting the GigaDevice product change notice
> AN-0392-10, version 1.0 from November 30, 2020.
> 
> As the overlaps are huge, variable names have been generalized
> accordingly.
> 
> Apart from the lowered ECC strength (4 instead of 8 bits per 512 bytes),
> the new device ID, and the extra quad IO dummy byte, no changes had to
> be taken into account.
> 
> New hardware features are not supported, namely:
>  - Power on reset
>  - Unique ID
>  - Double transfer rate (DTR)
>  - Parameter page
>  - Random data quad IO
> 
> The inverted semantic of the "driver strength" register bits, defaulting
> to 100% instead of 50% for the Q5 devices, got ignored as the driver has
> never touched them anyway.
> 
> The no longer supported "read from cache during block erase"
> functionality is not reflected as the current SPI NAND core does not
> support it anyway.
> 
> Implementation has been tested on MediaTek MT7688 based GARDENA smart
> Gateways using both, GigaDevice GD5F1GQ5UEYIG and GD5F1GQ4UBYIG.
> 
> Signed-off-by: Reto Schneider <reto.schneider at husqvarnagroup.com>
> Reviewed-by: Frieder Schrempf <frieder.schrempf at kontron.de>
> Reviewed-by: Stefan Roese <sr at denx.de>

Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git nand/next, thanks.

Miquel