[PATCH v9 0/5] spi: cadence-quadspi: Add QSPI controller support for Intel LGM SoC

Mark Brown broonie at kernel.org
Wed Jan 13 10:28:30 EST 2021


On Tue, 24 Nov 2020 12:18:35 +0800, Ramuthevar, Vadivel MuruganX wrote:
> Add QSPI controller support for Intel LGM SoC.
> 
> Patches to move move bindings over to
> "Documentation/devicetree/bindings/spi/" directory and also added compatible
> Support for Intel platform.
> 
> dt-bindings: spi: cadence-qspi: Add support for Intel lgm-qspi
> (earlier patch mail thread and Ack-by)
> link: "https://lore.kernel.org/lkml/5d6d1b85.1c69fb81.96938.0315@mx.google.com/"
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/5] spi: cadence-quadspi: Add QSPI support for Intel LGM SoC
      commit: ab2d28750aacb773dc42d72fbad59146e8a6db5e
[2/5] spi: cadence-quadspi: Disable the DAC for Intel LGM SoC
      commit: ad2775dc3fc5d30dd51984ccbaa736cc7ea9caca
[3/5] spi: cadence-quadspi: Add multi-chipselect support for Intel LGM SoC
      commit: b436fb7d29bfa48ff5e00cbf413609c7a6d4d81e
[4/5] spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi
      commit: eb4aadc31ef4224b926d5165048cb297f4bda34f
[5/5] dt-bindings: spi: cadence-qspi: Add support for Intel lgm-qspi
      commit: fcebca39938fa9f6ed03f27fc75645ad7fd489e9

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark



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