[PATCH 2/2] mtd: spi-nor: disable 16-bit-sr for macronix

Fri Dec 31 01:50:22 PST 2021

Meanwhile I also tested on:
- mx25l12805d (Litebeam AC Gen2)

On 12/31/21 10:10, Nick wrote:
> I looked now through all datasheets I found and the sizes of the 
> status register. However, I did not find any datasheet for the 
> "mx66l1g55g".
> However, I am not sure if I maybe miss something to see if 
> "SNOR_F_HAS_16BIT_SR" is supported. I only looked at the status 
> register size.
>
> It is also now merged in OpenWrt, so maybe we wait some time and see 
> if someone complains?
> https://github.com/openwrt/openwrt/commit/83b5fbddf28e943e8c90b4099a1e36d158f5995c 
>
>
> Otherwise, I documented my findings:
> mx25l512e: 8bit 
> https://www.macronix.com/Lists/Datasheet/Attachments/7398/MX25L512E,%203V,%20512Kb,%20v1.4.pdf 
> (slide 13)
> mx25l2005a: 8bit 
> https://www.macrogroup.ru/sites/default/files/uploads/mx25l2005_3v_2mb_v1.9.pdf 
> (slide 12)
> mx25l4005a: 8bit 
> https://pdf1.alldatasheet.com/datasheet-pdf/view/267913/MCNIX/MX25L4005A.html 
> (slide 11)
> mx25l8005: 8bit 
> https://pdf1.alldatasheet.com/datasheet-pdf/view/267915/MCNIX/MX25L8005.html 
> (slide 11)
> mx25l1606e: 8bit 
> https://www.macronix.com/Lists/Datasheet/Attachments/7465/MX25L1606E,%203V,%2016Mb,%20v1.9.pdf 
> (slide 18)
> mx25l3205d: 8bit 
> https://pdf1.alldatasheet.com/datasheet-pdf/view/267908/MCNIX/MX25L3205D.html 
> (slide 19)
> mx25l3255e: 8bit 
> https://www.application-datasheet.com/pdf/macronix/mx25l3255em2i-10g.pdf 
> (slide 22)
> mx25l6405d: 8bit 
> https://datasheet.octopart.com/MX25L6405DZNI-12G-Macronix-datasheet-8325093.pdf 
> (slide 19)
> mx25u2033e: 8bit 
> https://datasheetspdf.com/pdf-file/792587/MACRONIX/MX25U2033E/1 (slide 
> 21)
> mx25u3235f: 8bit 
> https://www.macronix.com/Lists/Datasheet/Attachments/7438/MX25U3235F,%201.8V,%2032Mb,%20v1.6.pdf 
> (slide 31)
> mx25u4035: 8bit 
> https://www.macronix.com/Lists/Datasheet/Attachments/7295/MX25U4035,%201.8V,%204Mb,%20v1.4.pdf 
> (slide 19)
> mx25u8035: 8bit 
> https://www.macronix.com/Lists/Datasheet/Attachments/7295/MX25U4035,%201.8V,%204Mb,%20v1.4.pdf 
> (slide 19)
> mx25u6435f: 8bit 
> https://www.macronix.com/Lists/Datasheet/Attachments/7411/MX25U6435F,%201.8V,%2064Mb,%20v1.5.pdf 
> (slide 31)
> mx25l12805d: 8bit 
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/7321/MX25L12805D,%203V,%20128Mb,%20v1.2.pdf 
> (slide 13)
> mx25l12855e: 8bit 
> https://datasheetspdf.com/pdf-file/653682/MacronixInternational/MX25L12855E/1 
> (slide 17)
> mx25r1635f: 8bit 
> https://www.macronix.com/Lists/Datasheet/Attachments/7595/MX25R1635F,%20Wide%20Range,%2016Mb,%20v1.6.pdf 
> (slide 30)
> mx25r3235f: 8bit 
> https://www.digikey.de/en/datasheets/macronix/macronixmx25r3235f20wide20range2032mb20v16 
> (slide 31)
> mx25u12835f: 8bit 
> https://www.macronix.com/Lists/Datasheet/Attachments/7656/MX25U12835F,%201.8V,%20128Mb,%20v1.9.pdf 
> (slide 31)
> mx25l25635e: 8bit 
> https://www.macronix.com/Lists/Datasheet/Attachments/7331/MX25L25635E,%203V,%20256Mb,%20v1.3.pdf 
> (slide 18)
> mx25u25635f: 8bit 
> https://www.macronix.com/Lists/Datasheet/Attachments/7410/MX25U25635F,%201.8V,%20256Mb,%20v1.5.pdf 
> (slide 33)
> mx25u51245g: 8bit 
> https://www.macronix.com/Lists/Datasheet/Attachments/7874/MX25U51245G,%201.8V,%20512Mb,%20v1.3.pdf 
> (slide 27)
> mx25v8035f: 8bit 
> https://www.macronix.com/Lists/Datasheet/Attachments/7432/MX25V8035F,%202.5V,%208Mb,%20v1.4.pdf 
> (slide 29)
> mx25l25655e: 8bit 
> https://datasheetspdf.com/pdf-file/843325/MACRONIX/MX25L25655E/1 
> (slide 18)
> mx66l51235f: 8bit 
> https://www.macronix.com/Lists/Datasheet/Attachments/7401/MX66L51235F,%203V,%20512Mb,%20v1.1.pdf 
> (slide 34)
> mx66u51235f: 8bit 
> https://www.macronix.com/Lists/Datasheet/Attachments/7674/MX66U51235F,%201.8V,%20512Mb,%20v1.1.pdf 
> (slide 34)
> mx66l1g45g: 8bit 
> https://www.macronix.com/Lists/Datasheet/Attachments/7857/MX66L1G45G,%203V,%201Gb,%20v1.5.pdf 
> (slide 37)
> mx66u2g45g: 
> https://www.macronix.com/Lists/Datasheet/Attachments/7884/MX66U2G45G,%201.8V,%202Gb,%20v1.1.pdf 
> (slide 27)
>
> On 12/29/21 15:08, Tudor.Ambarus at microchip.com wrote:
>> On 12/27/21 11:16 AM, vincent at systemli.org wrote:
>>> EXTERNAL EMAIL: Do not click links or open attachments unless you 
>>> know the content is safe
>>>
>>> From: Nick Hainke <vincent at systemli.org>
>>>
>>> Macronix flash chips seem to consist of only one status register.
>>> These chips will not work with the "16-bit Write Status (01h) Command".
>>> Disable SNOR_F_HAS_16BIT_SR for all Macronix chips.
>> Hi, Vincent!
>>
>> Have you checked all the existing macronix flash_info entries and 
>> determined
>> that neither of them support SNOR_F_HAS_16BIT_SR? Per manufacturer 
>> settings
>> are a bit sensible because we can't predict what manufacturers are 
>> doing with
>> new flash designs and whether they'll respect their "legacy" flash 
>> settings or
>> not. Thus I'm a bit reluctant in adding per manufacturer settings.
>>
>> Cheers,
>> ta
>>
>>> Tested with MX25L6405D.
>>>
>>> Fixes: 39d1e3340c73 ("mtd: spi-nor: Fix clearing of QE bit on
>>> lock()/unlock()")
>>>
>>> Signed-off-by: David Bauer <mail at david-bauer.net>
>>> Signed-off-by: Nick Hainke <vincent at systemli.org>
>>> ---
>>>   drivers/mtd/spi-nor/macronix.c | 1 +
>>>   1 file changed, 1 insertion(+)
>>>
>>> diff --git a/drivers/mtd/spi-nor/macronix.c 
>>> b/drivers/mtd/spi-nor/macronix.c
>>> index f07b59a4120a..d530ab0b3b13 100644
>>> --- a/drivers/mtd/spi-nor/macronix.c
>>> +++ b/drivers/mtd/spi-nor/macronix.c
>>> @@ -94,6 +94,7 @@ static void macronix_default_init(struct spi_nor 
>>> *nor)
>>>   {
>>>          nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
>>>          nor->params->set_4byte_addr_mode = 
>>> spi_nor_set_4byte_addr_mode;
>>> +       nor->flags &= ~SNOR_F_HAS_16BIT_SR;
>>>   }
>>>
>>>   static const struct spi_nor_fixups macronix_fixups = {
>>> -- 
>>> 2.34.1
>>>
>>>
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>>>
>
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