[PATCH v2 4/6] spi: spi-mem: reject partial cycle transfers in 8D-8D-8D mode
Tudor.Ambarus at microchip.com
Tudor.Ambarus at microchip.com
Thu Dec 23 03:43:06 PST 2021
On 5/31/21 9:17 PM, Pratyush Yadav wrote:
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>
> In 8D-8D-8D mode two bytes are transferred per cycle. So an odd number
> of bytes cannot be transferred because it would leave a residual half
> cycle at the end. Consider such a transfer invalid and reject it.
>
> Signed-off-by: Pratyush Yadav <p.yadav at ti.com>
> Reviewed-by: Mark Brown <broonie at kernel.org>
>
> ---
>
> Changes in v2:
> - Add Mark's R-by (spell corrected).
>
> drivers/spi/spi-mem.c | 12 +++++++++++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
> index 1513553e4080..ab9eefbaa1d9 100644
> --- a/drivers/spi/spi-mem.c
> +++ b/drivers/spi/spi-mem.c
> @@ -162,7 +162,17 @@ static bool spi_mem_check_buswidth(struct spi_mem *mem,
> bool spi_mem_dtr_supports_op(struct spi_mem *mem,
> const struct spi_mem_op *op)
> {
> - if (op->cmd.nbytes != 2)
> + if (op->cmd.buswidth == 8 && op->cmd.nbytes % 2)
!IS_ALIGNED(op->cmd.nbytes, 2)?
> + return false;
> +
> + if (op->addr.nbytes && op->addr.buswidth == 8 && op->addr.nbytes % 2)
> + return false;
> +
> + if (op->dummy.nbytes && op->dummy.buswidth == 8 && op->dummy.nbytes % 2)
> + return false;
> +
> + if (op->data.dir != SPI_MEM_NO_DATA &&
> + op->dummy.buswidth == 8 && op->data.nbytes % 2)
dummy is sent on the same buswidth as data's indeed, but I would
s/op->dummy.buswidth/op->data.buswidth for code consistency reasons.
> return false;
>
> return spi_mem_check_buswidth(mem, op);
> --
> 2.30.0
>
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