[PATCH v8 01/14] spi: spi-mem: reject partial cycle transfers in

[Pratyush Yadav]

On 22/12/21 09:12AM, Miquel Raynal wrote:
> Hi Pratyush,
> 
> p.yadav at ti.com wrote on Wed, 22 Dec 2021 00:11:50 +0530:
> 
> > Hi,
> > 
> > On 21/12/21 06:48PM, Miquel Raynal wrote:
> > > From: Pratyush Yadav <p.yadav at ti.com>
> > > 
> > > In 8D-8D-8D mode two bytes are transferred per cycle. So an odd number
> > > of bytes cannot be transferred because it would leave a residual half
> > > cycle at the end. Consider such a transfer invalid and reject it.
> > > 
> > > Signed-off-by: Pratyush Yadav <p.yadav at ti.com>
> > > Reviewed-by: Mark Brown <broonie at kernel.org>
> > > Signed-off-by: Miquel Raynal <miquel.raynal at bootlin.com>  
> > 
> > Sorry, I didn't realize this before. This patch would break a couple of 
> > SPI NOR flashes. You need patch 1, 2, and 3 from my series as well to 
> > make sure this does not happen. Since those patches have some pending 
> > comments, can you just drop this patch and I will re-roll it on top of 
> > your series later when I can find some time for it? Again, sorry for not 
> > noticing this before.
> 
> Yes no problem, I might as well drop it when applying.

And drop the changes from patch 3 as well.

> 
> Thanks,
> Miquèl

-- 
Regards,
Pratyush Yadav
Texas Instruments Inc.