[PATCH v7 04/14] spi: cadence: Provide a capability structure

[Pratyush Yadav]

> Subject: [PATCH v7 04/14] spi: cadence: Provide a capability structure

s/cadence/cadence-quadspi/

On 17/12/21 05:16PM, Miquel Raynal wrote:
> This controller has DTR support, so advertize it with a capability now
> that the spi_controller_mem_ops structure contains this new field. This
> will later be used by the core to discriminate whether an operation is
> supported or not, in a more generic way than having different helpers.
> 
> Signed-off-by: Miquel Raynal <miquel.raynal at bootlin.com>
> ---
>  drivers/spi/spi-cadence-quadspi.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
> index 101cc71bffa7..98e0cc4236e3 100644
> --- a/drivers/spi/spi-cadence-quadspi.c
> +++ b/drivers/spi/spi-cadence-quadspi.c
> @@ -1388,10 +1388,15 @@ static const char *cqspi_get_name(struct spi_mem *mem)
>  	return devm_kasprintf(dev, GFP_KERNEL, "%s.%d", dev_name(dev), mem->spi->chip_select);
>  }
>  
> +static const struct spi_controller_mem_caps cqspi_mem_caps = {
> +	.dtr = true,
> +};
> +
>  static const struct spi_controller_mem_ops cqspi_mem_ops = {
>  	.exec_op = cqspi_exec_mem_op,
>  	.get_name = cqspi_get_name,
>  	.supports_op = cqspi_supports_mem_op,
> +	.caps = &cqspi_mem_caps,

I just noticed you put it under struct spi_mem_ops, not under struct 
spi_mem. This is not an operation per se so wouldn't it be better if it 
is moved to struct spi_mem?

Anyway, the change itself looks good to me. The cqspi_supports_mem_op()
already checks for mixed DTR modes so we should be good.

>  };
>  
>  static int cqspi_setup_flash(struct cqspi_st *cqspi)
> -- 
> 2.27.0
> 

-- 
Regards,
Pratyush Yadav
Texas Instruments Inc.