[PATCH v2 24/35] mtd: spi-nor: core: Fix spi_nor_flash_parameter otp description
Pratyush Yadav
p.yadav at ti.com
Tue Aug 17 09:47:51 PDT 2021
On 27/07/21 07:52AM, Tudor Ambarus wrote:
> Update the description of the otp member of the
> struct spi_nor_flash_parameter.
>
> Signed-off-by: Tudor Ambarus <tudor.ambarus at microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav at ti.com>
> ---
> drivers/mtd/spi-nor/core.h | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
> index 7fb0cfabe85a..501d9212ba9b 100644
> --- a/drivers/mtd/spi-nor/core.h
> +++ b/drivers/mtd/spi-nor/core.h
> @@ -250,7 +250,7 @@ struct spi_nor_otp {
> * higher index in the array, the higher priority.
> * @erase_map: the erase map parsed from the SFDP Sector Map Parameter
> * Table.
> - * @otp_info: describes the OTP regions.
> + * @otp: SPI NOR OTP info.
> * @octal_dtr_enable: enables SPI NOR octal DTR mode.
> * @quad_enable: enables SPI NOR quad mode.
> * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
> @@ -262,7 +262,6 @@ struct spi_nor_otp {
> * e.g. different opcodes, specific address calculation,
> * page size, etc.
> * @locking_ops: SPI NOR locking methods.
> - * @otp: SPI NOR OTP methods.
> */
> struct spi_nor_flash_parameter {
> u64 size;
> --
> 2.25.1
>
--
Regards,
Pratyush Yadav
Texas Instruments Inc.
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