gpmi-nand ecc

[Sean Nyekjaer]

Hi,

I have two boards with a iMX6ULL SoC one attached to a Micron NAND flash 
(MT29F4G08ABAFAWP) and one a Toshiba (TC58BVG2S0HTAI0).

After updating the boards from u-boot 2018.07 -> 2020.01, the Micron 
fitted boards is having ECC problems(in u-boot).
U-boot 2018.07 selects ecc_strength to 18.
U-boot 2020.01 selects ecc_strength to 8, but if I hardcode u-boot to 
run the mxs_nand_legacy_calc_ecc_layout() it selects 18 bits.

The Toshiba boards always selects 8 bit ecc_strength so they have no issues.

The kernel driver (gpmi-nand.c) seems to also use the legacy method 
(Resulting 18 bits in ecc strength for the Micron NAND).
In common_nfc_set_geometry(): Both chip->ecc.strength and chip->ecc.size 
are 0.

I would expect ecc.strength to be set to 8, earlier but cannot find the 
spot where it should be set.
Is the gpmi-nand driver missing a call to nand_ecc_choose_conf()?
Maybe we need a legacy option for the kernel like u-boot.

We have +10K boards deployed so it's not so easy to switch from 18 -> 8 
bits.
I can explicit fix this in U-boot by forcing the legacy mode via a dt 
flag, but the gut feeling says this will come back to haunt us :)

/Sean