sunxi_nand.c: Allwinner H3 dma support not mainline

[Roland Ruckerbauer]

Hi there,

Does anyone know anything about Allwinner H3 SoC interaction between the DMA controller and the nand flash controller?  

I am currently working on an embedded linux project on a Allwinner H3 SoC. We use a raw (SLC) nand chip for read/write storage and boot device. 
We have been using the nand flash controller in "non dma mode" until now. We want to switch over to using "DMA mode", because we started to question
the reliability of the non DMA direct SRAM access mode. 

We have experienced numerous data corruption issues while using UBIFS. The errors are 
almost exclusively non-recoverable, which essentially bricks the whole device. Errors can be reproduced by inducing random power cuts on the
device, while doing write IO on the mounted file system.

Our current theory is, that the sunxi NDFC does not properly write whole pages to the actual flash device, when working in direct SRAM access mode.
As I understand, only 1K of the NDFC SRAM is actually directly mapped into memory, so maybe the flash controller writes part of a page to the actual
storage device (maybe in ECC step sizes).

We tried to enable DMA mode, because the official Allwinner https://github.com/allwinner-zh/linux-3.4-sunxi/tree/master/modules/nand/nand_sun9i always
uses some sort of DMA for the NDFC. Maybe they did not properly test the non-dma mode.

Now to the actual problem:

We can not get the upstream driver to work with DMA on the H3 SoC. We tried it on a A33 dev board, where it works out of the box.
We assume that there is some sort of undocumented difference between the A23/A33 and H3 NDFC. The official sunxi linux-3.4 nand driver does a
check for a magic byte at physical address 0x01c00024 with the value 0x00001650. If this value matches, it uses the "gdma", which we assume means
generic / normal DMA.

Here are the values for A33 and H3
 * A33 0x1667
 * H3  0x1680

Do you think, that we have to use the dedicated IDMA on the Allwinner H3? If so, we would appreciate any pointers / tips, maybe even some datasheets,
if someone has access to them. The datasheets on https://linux-sunxi.org/Main_Page do not tell us any difference between the H3 and A33 NDFC.

We would be happy to upstream the necessary changes for supporting the H3 NDFC. We already have a working prototype driver with IDMA, but we don`t
really trust it. We also have some difficulties integrating it with mainline, e.g. we have no idea how to cancel a timed out dma transaction etc...

Hope anyone can help,

Roland Ruckerbauer, Manuel Dipolt