[PATCH 2/2] mtd: spi-nor: Disable the flash quad mode in spi_nor_restore()

[Yicong Yang]

On 2020/9/3 13:33, Matthias Weißer wrote:
> Am Do., 3. Sept. 2020 um 05:04 Uhr schrieb Yicong Yang
> <yangyicong at hisilicon.com>:
>> Hi Matthias,
>> On 2020/9/2 20:15, Matthias Weißer wrote:
>>> Hi Vignesh
>>>
>>> Am Di., 1. Sept. 2020 um 16:20 Uhr schrieb Yicong Yang
>>> <yangyicong at hisilicon.com>:
>>>> I've tested the following patch with s25fs128s1.
>>>> I left the flash quad enabled before managed by spi-nor driver,
>>>> and it'll stay QE after removed. So I think it'll also address the issue
>>>> mentioned. Please have a test.
>>> Thanks for the patch. I can confirm that current 5.9-rc3 bricks my hardware
>>> and your patch on top of it fixes that. Therefore
>>>
>>> Tested-by: Matthias Weisser <m.weisser.m at gmail.com>
>>>
>>> But I am still concerned about wearing out nonvolatile QE bits (not in my
>>> case, but there may be others) which may also brick hardware after a lot of
>>> boots (by set and reset QE bit on every boot).
>>>
>>> So, from my limited point of view, your patch fixes my problem but overall
>>> I think the original approach should be thought-out a bit more.
>> Thanks for testing the patch.
>>
>> The driver will try to set the QE bit when 1) in ->quad_enable() if QE bit is not set and
>> 2) previously without this patch in spi_nor_restore() to try to disable the flash quad mode.
>>
>> With this patch, if the QE bit is originally set the driver will only read and record it and
>> will not disable the quad mode in spi_nor_restore(). What the driver will do is to read
>> the bit, without trying to set or reset it. So I think it will not wear out the those nonvolatile
>> QE bits.
> I think it will. Expect a flash with the QE bit not set. Kernel boots, set the
> bit which will cause an erase cycle (setting it from 0 to 1). On shutdown the
> bit is reset (transition from 1 to 0) which will cause a program cycle. So,
> every boot -> shutdown cycle causes at least one program-erase cycle which will
> wear out that area of the flash.
>
> See also this quote from the datasheet of F25FL512S:
> "Non-volatile bits have the same cycling (erase and program) endurance
> as the main
> flash array."
>
> I still think the reset of the QE (or any other non-volatile) bit on
> shutdown should
> be prevented and only allowed by explicitly enable it (e.g. per system in DT or
> per flash in flash_info struct).

you may find the revert patches at:
https://lore.kernel.org/linux-mtd/1599205640-26690-1-git-send-email-yangyicong@hisilicon.com/

thanks for the illustration.

Regards,
Yicong

>
> Regards,
> Matthias
> .
>