imx27: Unsupported ECC algorithm

Han Xu xhnjupt at gmail.com
Thu Oct 15 23:04:14 EDT 2020


On Wed, Oct 14, 2020 at 8:32 AM Miquel Raynal <miquel.raynal at bootlin.com> wrote:
>
> Hi Fabio, Sascha, Lucas,
>
> Fabio Estevam <festevam at gmail.com> wrote on Wed, 14 Oct 2020 09:23:06
> -0300:
>
> > Hi Lucas,
> >
> > On Tue, Oct 13, 2020 at 2:14 PM Lucas Stach <l.stach at pengutronix.de> wrote:
> >
> > > Just a heads up: our lab was broken for some time due to a local issue.
> > > It's now back to working and the backlog of jobs is being executed on
> > > the boards right now, so results should show up in the near furture.
> >
> > Thanks. kernelci results are showing up again.
> >
> > Hi Miquel,
> >
> > The ECC issues are still present on imx27-phytec-phycard-s-rdk:
> > https://storage.kernelci.org/next/master/next-20201013/arm/imx_v4_v5_defconfig/gcc-8/lab-pengutronix/baseline-imx27-phytec-phycard-s-rdk.html
> >
> > BTW, ECC errors are also reported on a Freescale Layerscape 2088A RDB Board:
> > https://www.spinics.net/lists/iommu/msg49772.html
> >
>
> I supposed the failing division is this one:
>
>         /*
>          * Set the number of read / write steps for one page depending on ECC
>          * mode.
>          */
>         ecc->steps = mtd->writesize / ecc->size;
>         if (ecc->steps * ecc->size != mtd->writesize) {
>                 WARN(1, "Invalid ECC parameters\n");
>                 ret = -EINVAL;
>                 goto err_nand_manuf_cleanup;
>         }
>
> Which produces the warning right after. This would mean that
>
>         ecc->size == 0
>
> But this entry is set before calling nand_scan() in mxcnd_probe() to
> 512, and that does not make sense.
>
> I guess we should be able to reproduce this error with any board using
> the mxc NAND driver with hardware correction (now also called "on
> host"). Do you have such a board available to at least verify that the
> beginning of my logic is right?

Hi Miquel,

I debugged on one LS1043A platform and found in rawnand_dt_init(), the
chip->ecc.strength was set to nand->ecc.user_conf.strength, which may
not have been touched before. Same as chip->ecc.size.

>
> Thanks,
> Miquèl
>
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-- 
Sincerely,

Han XU



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