[PATCH] mtd: spi-nor: Fix quad enable for Spansion like flashes

Tudor.Ambarus at microchip.com Tudor.Ambarus at microchip.com
Fri Jan 17 05:58:17 PST 2020


Miquel,

Please queue this to mtd/fixes.

Thanks,
ta

On Thursday, January 16, 2020 11:37:00 AM EET Michael Walle wrote:
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> 
> The commit 7b678c69c0ca ("mtd: spi-nor: Merge spansion Quad Enable
> methods") forgot to actually set the QE bit in some cases. Thus this
> breaks quad mode accesses to flashes which support readback of the
> status register-2. Fix it.
> 
> Fixes: 7b678c69c0ca ("mtd: spi-nor: Merge spansion Quad Enable methods")
> Signed-off-by: Michael Walle <michael at walle.cc>
> ---
>  drivers/mtd/spi-nor/spi-nor.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index addb6319fcbb..ea0429448207 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -2140,6 +2140,8 @@ static int spi_nor_sr2_bit1_quad_enable(struct spi_nor
> *nor) if (nor->bouncebuf[0] & SR2_QUAD_EN_BIT1)
>                 return 0;
> 
> +       nor->bouncebuf[0] |= SR2_QUAD_EN_BIT1;
> +
>         return spi_nor_write_16bit_cr_and_check(nor, nor->bouncebuf[0]);
>  }
> 
> --
> 2.20.1






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