[External] Re: [PATCH] mtd: spi-nor: Add support for sst26vf016b

Tudor.Ambarus at microchip.com Tudor.Ambarus at microchip.com
Thu Jan 16 03:00:45 PST 2020


On Monday, January 6, 2020 6:33:13 PM EET Joseph Kust wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
> 
> Tudor,
> 
> On Mon, Dec 23, 2019 at 9:34 AM <Tudor.Ambarus at microchip.com> wrote:
> > Hi, Joseph,
> > 
> > On 12/10/19 9:49 PM, Joseph Kust wrote:
> > > EXTERNAL EMAIL: Do not click links or open attachments unless you know
> > > the content is safe
> > > 
> > > Hi Tudor,
> > > 
> > > On Tue, Dec 10, 2019 at 11:10 AM <Tudor.Ambarus at microchip.com> wrote:
> > >> Hi, Brandon,
> > >> 
> > >> On 11/17/19 11:55 PM, Brandon Maier wrote:
> > >>> EXTERNAL EMAIL: Do not click links or open attachments unless you know
> > >>> the content is safe
> > >>> 
> > >>> From: Joseph Kust <joseph.kust at rockwellcollins.com>
> > >>> 
> > >>> Adds support for sst26vf016b, a smaller variant of the sst26vf064b.
> > >> 
> > >> How was this tested, what controller did you use? Did you test the quad
> > >> read?> > 
> > > This was tested on a sama5d3 SOC using the atmel,at91rm9200-spi
> > > controller.  The quad read was not tested.
> > > Kernel versions tested were branched from mainline 4.14.115 and 3.14.79
> > 
> > Thanks. The commit message should specify what modes were tested and
> > on which controller.
> > 
> > >>> Signed-off-by: Joseph Kust <joseph.kust at rockwellcollins.com>
> > >>> Signed-off-by: Brandon Maier <brandon.maier at rockwellcollins.com>
> > >>> ---
> > >>> 
> > >>>  drivers/mtd/spi-nor/spi-nor.c | 1 +
> > >>>  1 file changed, 1 insertion(+)
> > >>> 
> > >>> diff --git a/drivers/mtd/spi-nor/spi-nor.c
> > >>> b/drivers/mtd/spi-nor/spi-nor.c
> > >>> index f4afe123e9dc..500929903f61 100644
> > >>> --- a/drivers/mtd/spi-nor/spi-nor.c
> > >>> +++ b/drivers/mtd/spi-nor/spi-nor.c
> > >>> @@ -2538,6 +2538,7 @@ static const struct flash_info spi_nor_ids[] = {
> > >>> 
> > >>>         { "sst25wf080",  INFO(0xbf2505, 0, 64 * 1024, 16, SECT_4K |
> > >>>         SST_WRITE) },
> > >>>         { "sst26wf016b", INFO(0xbf2651, 0, 64 * 1024, 32, SECT_4K |
> > >>>         
> > >>>                               SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
> > >>>                               },
> > >>> 
> > >>> +       { "sst26vf016b", INFO(0xbf2641, 0, 64 * 1024, 32, SECT_4K |
> > >>> SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },> 
> > The dual and quad reads will probably not work because they require
> > that the IOC bit from the Configuration Register to be set to 1,
> > which is not the case: the default value at power-up is 0 and we
> > don't set it to one in spi-nor either.
> > 
> > I can drop the SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ flags and apply
> > your patch without these if you want.
> > 
> > Cheers,
> > ta
> 
> Yes those flags should be dropped.  We likely copied them from the
> other sst26 flags and thought they were the same.  You are welcome to
> drop the flags and apply the patch.  Otherwise let us know if you'd
> prefer us to re-send.
> Thanks,
> Joseph

Actually just the Quad Read requires the IOC bit set. I dropped 
SPI_NOR_QUAD_READ, and amended the commit description.
Applied to spi-nor/next.

Thanks,
ta
> 
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