Read/Write the MTD flash via Octeon Simple Executive API's

neutrino network neutrino.network1 at gmail.com
Thu Jan 2 02:31:03 PST 2020


Cavium Octeon appliance has mtd0 to 5 flash present. I want to
log/dump firmware/Simple Executive crash backtrace to one of the solid
state storage/ flash in the appliance. For that I try to initialize
the flash with simple executive helping function in cvmx-flash.c;

cvmx_flash_initialize()

but on boot up the initialize function in Simple Executive prints

cvmx-flash: No CFI chips found

The cvmx_flash_initialize() in cvmx-flash.c code is shared below

void cvmx_flash_initialize(void){
int boot_region;
int chip_id = 0;

memset(flash_info, 0, sizeof(flash_info));

/* Loop through each boot bus chip select region */
for (boot_region=0; boot_region<MAX_NUM_FLASH_CHIPS; boot_region++)
{
    cvmx_mio_boot_reg_cfgx_t region_cfg;
    region_cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFG0 + boot_region*8);
    /* Only try chip select regions that are enabled. This assumes the
        bootloader already setup the flash */
    if (region_cfg.s.en)
    {

        /* Convert the hardware address to a pointer. Note that the bootbus,
            unlike memory, isn't 1:1 mapped in the simple exec */
        void *base_ptr = cvmx_phys_to_ptr((region_cfg.s.base<<16) |
0xffffffff80000000ull);

        if (__cvmx_flash_queury_cfi(chip_id, base_ptr) == 0)
        {
            /* Valid CFI flash chip found */
            chip_id++;
        }
    }
}

if (chip_id == 0){
    cvmx_dprintf("cvmx-flash: No CFI chips found\n");

}}

However on boot up the linux shows that it has mtd flash present with
CFI conformant;

Bootbus flash: Setting flash for 256MB flash at 0x10000000 with 2 bank(s)

phys_mapped_flash: Found 1 x16 devices at 0x0 in 16-bit bank

phys_mapped_flash: Found 1 x16 devices at 0x8000000 in 16-bit bank

Amd/Fujitsu Extended Query Table at 0x0040 phys_mapped_flash: CFI does

not contain boot bank location. Assuming top. number of CFI chips: 2

cfi_cmdset_0002: Disabling erase-suspend-program due to code

brokenness. Creating 6 MTD partitions on "phys_mapped_flash":

0x000000000000-0x000000200000 : "FAILSAFE-BOOTLOADER"

0x000000200000-0x0000003e0000 : "NORMAL-BOOTLOADER"

0x0000003e0000-0x000000400000 : "BOOTLOADER-ENVIRONMENT"

0x000000400000-0x000002200000 : "LINUX-KERNEL"

0x000002200000-0x000007200000 : "LINUX-FS"

0x000007200000-0x000008000000 : "RESERVED-14M"

and the flinfo in u-boot displays that mtd flash is present with CFI conformant;

Bank # 1: CFI conformant flash (16 x 16) Size: 128 MB in 1024 Sectors
AMD Standard command set, Manufacturer ID: 0x01, Device ID:

0x227E2228 Erase timeout: 4096 ms, write timeout: 1 ms Buffer

write timeout: 3 ms, buffer size: 64 bytes Sector Start Addresses:

B0000000 RO etc etc (lots of hex numbers displayed)

Bank # 2: CFI conformant flash (16 x 16) Size: 128 MB in 1024 Sectors

AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E2228

Erase timeout: 4096 ms, write timeout: 1 ms Buffer write timeout: 3
ms, buffer size: 64 bytes

Sector Start Addresses: B8000000 etc etc (lots of hex numbers displayed)


The mtd flash of the device is already being used by the u-boot and
linux but how can I use the same solid state storage/flash with
utility functions of cvmx-flash.c in bare metal simple executive
firmware of Cavium Octeon for the said purpose (i.e dumping crash)?
How octeon simple executive firmware can read/write the solid state
storage/flash that is already successfully accessible by linux &
uboot?



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