[PATCH v7 1/7] mtd: spi-nor: sst: fix BPn bits for the SST25VF064C

[Tudor.Ambarus at microchip.com]

On 12/3/20 1:00 AM, Michael Walle wrote:
> --- a/drivers/mtd/spi-nor/sst.c
> +++ b/drivers/mtd/spi-nor/sst.c
> @@ -18,7 +18,8 @@ static const struct flash_info sst_parts[] = {
>                               SECT_4K | SST_WRITE) },
>         { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64,
>                               SECT_4K | SST_WRITE) },
> -       { "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128, SECT_4K) },
> +       { "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128,
> +                             SECT_4K | SPI_NOR_4BIT_BP) },

And I would put 1/7 after 4/7, so that I can set the locking flags
in some order: SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP. We first indicate
that the flash supports locking, and then what kind of locking, BP3,
and not the other way around.

anyway, just cosmetics